Issued Patents All Time
Showing 26–28 of 28 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6184120 | Method of forming a buried plug and an interconnection | — | 2001-02-06 |
| 6140225 | Method of manufacturing semiconductor device having multilayer wiring | Tatsuya Usami, Hidemitsu Aoki, Shinya Yamasaki | 2000-10-31 |
| 5959359 | Semiconductor device with a copper wiring pattern | — | 1999-09-28 |