Issued Patents All Time
Showing 26–46 of 46 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6563730 | Low power static RAM architecture | Hengyang (James) Lin, Andrew J. Franklin | 2003-05-13 |
| 6525397 | Extended drain MOSFET for programming an integrated fuse element to high resistance in low voltage process technology | Alexander Kalnitsky, Albert Bergemont | 2003-02-25 |
| 6420217 | Method of an apparatus for programming an integrated fuse element to high resistance in low voltage technology | Alexander Kalnitsky, Albert Bergemont | 2002-07-16 |
| 6384398 | CMOS compatible pixel cell that utilizes a gated diode to reset the cell | Alexander Kalnitsky, Albert Bergemont | 2002-05-07 |
| 6380054 | Schottky diode with reduced size | Alexander Kalnitsky, Albert Bergemont | 2002-04-30 |
| 6380571 | CMOS compatible pixel cell that utilizes a gated diode to reset the cell | Alexander Kalnitsky, Albert Bergemont | 2002-04-30 |
| 6285590 | Low power consumption semiconductor ROM, EPROM, EEPROM and like circuit | Jasopin Lee, Derek C. Tao | 2001-09-04 |
| 6262460 | Long channel MOS transistor that utilizes a schottky diode to increase the threshold voltage of the transistor | Alexander Kalnitsky, Albert Bergemont | 2001-07-17 |
| 6229739 | Sense amplifier having a bias circuit with a reduced size | Alexander Kalnitsky, Albert Bergemont | 2001-05-08 |
| 6218866 | Semiconductor device for prevention of a floating gate condition on an input node of a MOS logic circuit and a method for its manufacture | Alexander Kalnitsky | 2001-04-17 |
| 6218688 | Schottky diode with reduced size | Alexander Kalnitsky, Albert Bergemont | 2001-04-17 |
| 6184557 | I/O circuit that utilizes a pair of well structures as resistors to delay an ESD event and as diodes for ESD protection | Alexander Kalnitsky, Hengyang (James) Lin, Albert Bergemont | 2001-02-06 |
| 6169310 | Electrostatic discharge protection device | Alexander Kalnitsky, Albert Bergemont, Hengyang (James) Lin | 2001-01-02 |
| 6122204 | Sense amplifier having a bias circuit with a reduced size | Alexander Kalnitsky, Albert Bergemont | 2000-09-19 |
| 6078094 | Starter current source device with automatic shut-down capability and method for its manufacture | Alexander Kalnitsky, Albert Bergemont | 2000-06-20 |
| 6078211 | Substrate biasing circuit that utilizes a gated diode to set the bias on the substrate | Alexander Kalnitsky, Albert Bergemont | 2000-06-20 |
| 6049202 | Reference current generator with gated-diodes | Alexander Kalnitsky, Albert Bergemont | 2000-04-11 |
| 6031275 | Antifuse with a silicide layer overlying a diffusion region | Alexander Kalnitsky, Albert Bergemont | 2000-02-29 |
| 5982676 | Low voltage generator for bitlines | Alexander Kalnitsky | 1999-11-09 |
| 5978269 | Apparatus and method for lowering the potential barrier across the source-to-well junction during the programming of non-volatile memory cells | Albert Bergemont, Alexander Kalnitsky | 1999-11-02 |
| 5721545 | Methods and apparatus for serial-to-parallel and parallel-to-serial conversion | — | 1998-02-24 |