JB

Jiankang Bu

NS National Semiconductor: 24 patents #47 of 2,238Top 3%
IP Ideal Power: 3 patents #5 of 18Top 30%
PI Power Integrations: 1 patents #146 of 206Top 75%
🗺 Texas: #4,299 of 125,132 inventorsTop 4%
Overall (All Time): #135,528 of 4,157,543Top 4%
28
Patents All Time

Issued Patents All Time

Showing 1–25 of 28 patents

Patent #TitleCo-InventorsDate
12388442 Unidirectional hybrid switch circuit Ruiyang YU, Yifan Jiang, R. Daniel BRDAR, Mudit KHANNA 2025-08-12
12148819 System and method for bi-directional trench power switches Constantin Bulucea, Alireza Mojab, Jeffrey KNAPP, Robert Daniel BRDAR 2024-11-19
11881525 Semiconductor device with bi-directional double-base trench power switches Constantin Bulucea, Alireza Mojab, Jeffrey KNAPP, Robert Daniel BRDAR 2024-01-23
9972681 High voltage vertical semiconductor device with multiple pillars in a racetrack arrangement Alexei Ankoudinov, Sorin S. Georgescu, Vijay Parthasarathy, Kelly Marcum 2018-05-15
8502296 Non-volatile memory cell with asymmetrical split gate and related system and method Andre P. Labonte, Mark Rathmell 2013-08-06
8274824 High-performance CMOS-compatible non-volatile memory cell and related method 2012-09-25
8241975 System and method for providing low voltage high density multi-bit storage flash memory Lee James Jacobson, Andre P. Labonte 2012-08-14
8198708 System and method for improving CMOS compatible non volatile memory retention reliability Henry G. Prosack, Jr., David C. Parker, Heather McCulloh 2012-06-12
8114738 System and method for providing low cost high endurance low voltage electrically erasable programmable read only memory David C. Parker 2012-02-14
8097923 Method for fabricating higher quality thicker gate oxide in a non-volatile memory cell and associated circuits Thanas Budri 2012-01-17
8013400 Method and system for scaling channel length Li-Heng Chou 2011-09-06
8004032 System and method for providing low voltage high density multi-bit storage flash memory Lee James Jacobson, Andre P. Labonte 2011-08-23
7910420 System and method for improving CMOS compatible non volatile memory retention reliability Henry G. Prosack, Jr., David C. Parker, Heather McCulloh 2011-03-22
7855146 Photo-focus modulation method for forming transistor gates and related transistor devices Li-Heng Chou 2010-12-21
7838203 System and method for providing process compliant layout optimization using optical proximity correction to improve CMOS compatible non volatile memory retention reliability Kenneth Martin Lewis, Li-Heng Chou 2010-11-23
7804714 System and method for providing an EPROM with different gate oxide thicknesses William S. Belcher, David C. Parker 2010-09-28
7790491 Method for forming non-volatile memory cells and related apparatus and system Li-Heng Chou 2010-09-07
7781289 Method for fabricating higher quality thicker gate oxide in a non-volatile memory cell and associated circuits Thanas Budri 2010-08-24
7777271 System and method for providing low cost high endurance low voltage electrically erasable programmable read only memory David C. Parker 2010-08-17
7773423 Low power, CMOS compatible non-volatile memory cell and related method and memory array 2010-08-10
7646638 Non-volatile memory cell that inhibits over-erasure and related method and memory array 2010-01-12
7586792 System and method for providing drain avalanche hot carrier programming for non-volatile memory applications William S. Belcher, David C. Parker 2009-09-08
7532496 System and method for providing a low voltage low power EPROM based on gate oxide breakdown 2009-05-12
7514940 System and method for determining effective channel dimensions of metal oxide semiconductor devices 2009-04-07
7512499 System and method for determining substrate doping density in metal oxide semiconductor devices William S. Belcher 2009-03-31