Issued Patents All Time
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9111754 | Floating gate structure with high electrostatic discharge performance | Min Luo | 2015-08-18 |
| 6091111 | High voltage mos device having an extended drain region with different dopant species | Monir H. El-Diwany | 2000-07-18 |
| 6063704 | Process for incorporating silicon oxynitride DARC layer into formation of silicide polysilicon contact | — | 2000-05-16 |
| 5994718 | Trench refill with selective polycrystalline materials | — | 1999-11-30 |
| 5893742 | Co-implantation of arsenic and phosphorus in extended drain region for improved performance of high voltage NMOS device | Monir H. El-Diwany | 1999-04-13 |
| 5571744 | Defect free CMOS process | Sheldon Aronowitz | 1996-11-05 |