Issued Patents All Time
Showing 1–16 of 16 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| RE44130 | Anti-pirate circuit for protection against commercial integrated circuit pirates | Daniel J. Lucero, Hengyang (James) Lin, Andrew J. Franklin, Pavel Poplevine | 2013-04-02 |
| 8384444 | I/O driver with pass gate feedback controlled output driver | Khusrow Kiani | 2013-02-26 |
| RE43922 | Balanced cells with fabrication mismatches that produce a unique number generator | — | 2013-01-15 |
| 8278995 | Bandgap in CMOS DGO process | Luan Vu | 2012-10-02 |
| 7928756 | Method and system for reducing I/O noise and power | Weiye Lu, Thomas Y. Tse | 2011-04-19 |
| 7876129 | Load sense and active noise reduction for I/O circuit | Wei Ye Lu | 2011-01-25 |
| 7605619 | I/O protection under over-voltage and back-drive conditions by single well charging | Weiye Lu, Khusrow Kiani | 2009-10-20 |
| 7602666 | Method of forming a unique number | — | 2009-10-13 |
| 7558969 | Anti-pirate circuit for protection against commercial integrated circuit pirates | Daniel J. Lucero, Hengyang (James) Lin, Andrew J. Franklin, Pavel Poplevine | 2009-07-07 |
| 7558720 | Dynamic computation of ESD guidelines | Rajesh R. Berigei, Sury Maturi, Marcel ter Beek | 2009-07-07 |
| 7482657 | Balanced cells with fabrication mismatches that produce a unique number generator | — | 2009-01-27 |
| 6670840 | Input clamp circuit for 5V tolerant and back-drive protection of I/O receivers using CMOS process | Khusrow Kiani | 2003-12-30 |
| 4975878 | Programmable memory data protection scheme | Sudhakar Boddu, Vikram Kowshik | 1990-12-04 |
| 4873671 | Sequential read access of serial memories with a user defined starting address | Vikram Kowshik, Sudhakar Boddu | 1989-10-10 |
| 4858185 | Zero power, electrically alterable, nonvolatile latch | Vikram Kowshik | 1989-08-15 |
| 4581672 | Internal high voltage (Vpp) regulator for integrated circuits | — | 1986-04-08 |