PL

Po-Chun Lin

NT Nanya Technology: 54 patents #9 of 775Top 2%
TSMC: 9 patents #2,978 of 12,232Top 25%
IBM: 3 patents #26,272 of 70,183Top 40%
AU Auo: 1 patents #111 of 312Top 40%
GT Gingy Technology: 1 patents #23 of 33Top 70%
Overall (All Time): #29,992 of 4,157,543Top 1%
69
Patents All Time

Issued Patents All Time

Showing 51–69 of 69 patents

Patent #TitleCo-InventorsDate
9893035 Stacked package structure and manufacturing method thereof 2018-02-13
9893037 Multi-chip semiconductor package, vertically-stacked devices and manufacturing thereof Chin-Lung Chu 2018-02-13
9881867 Conductive connection structure having stress buffer layer 2018-01-30
9831155 Chip package having tilted through silicon via 2017-11-28
9812414 Chip package and a manufacturing method thereof 2017-11-07
9799624 Wire bonding method and wire bonding structure 2017-10-24
9786593 Semiconductor device and method for forming the same 2017-10-10
9761535 Interposer, semiconductor package with the same and method for preparing a semiconductor package with the same 2017-09-12
9711442 Semiconductor structure 2017-07-18
9704818 Semiconductor structure and manufacturing method thereof 2017-07-11
9664852 Optical waveguide having several dielectric layers and at least one metal cladding layer 2017-05-30
9536785 Method of manufacturing through silicon via stacked structure 2017-01-03
9508673 Wire bonding method 2016-11-29
9362254 Wire bonding method and chip structure 2016-06-07
9305902 Chip package and method for forming the same 2016-04-05
9281242 Through silicon via stacked structure and a method of manufacturing the same 2016-03-08
9252105 Chip package 2016-02-02
9240381 Chip package and method for forming the same 2016-01-19
9147642 Integrated circuit device 2015-09-29