Issued Patents All Time
Showing 26–34 of 34 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7217581 | Misalignment test structure and method thereof | Chien-Chang Huang, Tie Jiang Wu, Yu-Wei Ting, Bo Ching Jiang | 2007-05-15 |
| 7091545 | Memory device and fabrication method thereof | Tieh-Chiang Wu, Chien-Chang Huang, Bo Ching Jiang, Yu-Wei Ting | 2006-08-15 |
| 7026647 | Device and method for detecting alignment of active areas and memory cell structures in DRAM devices | Tie Jiang Wu, Chien-Chang Huang, Bo Ching Jiang, Yu-Wei Ting | 2006-04-11 |
| 7015050 | Misalignment test structure and method thereof | Chien-Chang Huang, Tie Jiang Wu, Yu-Wei Ting, Bo Ching Jiang | 2006-03-21 |
| 6984534 | Method and device for detecting whether the alignment of bit line contacts and active areas in DRAM devices is normal | Tie Jiang Wu, Chien-Chang Huang, Yu-Wei Ting, Bo Ching Jiang | 2006-01-10 |
| 6902942 | Device and method for detecting alignment of deep trench capacitors and word lines in DRAM devices | Tie Jiang Wu, Chien-Chang Huang, Bo Ching Jiang, Yu-Wei Ting | 2005-06-07 |
| 6891216 | Test structure of DRAM | Chien-Chang Huang, Tie Jiang Wu, Yu-Wei Ting, Bo Ching Jiang | 2005-05-10 |
| 6875654 | Memory device and fabrication method thereof | Tieh-Chiang Wu, Chien-Chang Huang, Bo Ching Jiang, Yu-Wei Ting | 2005-04-05 |
| 6844207 | Method and device for detecting whether the alignment of bit line contacts and active areas in DRAM devices is normal | Tie Jiang Wu, Chien-Chang Huang, Yu-Wei Ting, Bo Ching Jiang | 2005-01-18 |