Issued Patents All Time
Showing 25 most recent of 40 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10402378 | Method and system for executing an executable file | George R. Cameron, Blake A. Jones | 2019-09-03 |
| 8930894 | Method and system for executing an executable file | George R. Cameron, Blake A. Jones | 2015-01-06 |
| 8856938 | Unvalidated privilege cap | Casper H. Dik, Scott A. Rotondo, Joep J. Vesseur | 2014-10-07 |
| 8108686 | Method and system for detecting modified pages | Casper H. Dik, Scott A. Rotondo, Joep J. Vesseur, William G. Young | 2012-01-31 |
| 7058656 | System and method of using extensions in a data structure without interfering with applications unaware of the extensions | Gary W. Winiger, Bradford R. Wetmore | 2006-06-06 |
| 6779182 | Real time thread dispatcher for multiprocessor applications | — | 2004-08-17 |
| 5991790 | Generation and delivery of signals in a two-level, multithreaded system | Devang K. Shah | 1999-11-23 |
| 5826081 | Real time thread dispatcher for multiprocessor applications | — | 1998-10-20 |
| 5021991 | Coprocessor instruction format | Douglas B. MacGregor, David S. Mothersole | 1991-06-04 |
| 4994961 | Coprocessor instruction format | Douglas B. MacGregor, David S. Mothersole | 1991-02-19 |
| 4914578 | Method and apparatus for interrupting a coprocessor | Douglas B. MacGregor, David S. Mothersole | 1990-04-03 |
| 4890223 | Paged memory management unit which evaluates access permissions when creating translator | Michael Cruess, William C. Moyer | 1989-12-26 |
| 4887203 | Microcoded processor executing microroutines with a user specified starting microaddress | Douglas B. MacGregor, William C. Moyer, David S. Mothersole | 1989-12-12 |
| 4821231 | Method and apparatus for selectively evaluating an effective address for a coprocessor | Michael Cruess, David S. Mothersole, Douglas B. MacGregor | 1989-04-11 |
| 4811274 | Method and apparatus for selectively evaluating an effective address for a coprocessor | Michael Cruess, David S. Mothersole, Douglas B. MacGregor | 1989-03-07 |
| 4800489 | Paged memory management unit capable of selectively supporting multiple address spaces | William C. Moyer, Michael Cruess, William M. Keshlear | 1989-01-24 |
| 4766537 | Paged memory management unit having stack change control register | — | 1988-08-23 |
| 4763250 | Paged memory management unit having variable number of translation table levels | William M. Keshlear, William C. Moyer | 1988-08-09 |
| 4763244 | Paged memory management unit capable of selectively supporting multiple address spaces | William C. Moyer, Michael Cruess, William M. Keshlear | 1988-08-09 |
| 4758978 | Method and apparatus for selectively evaluating an effective address for a coprocessor | Michael Cruess, David S. Mothersole, Douglas B. MacGregor | 1988-07-19 |
| 4757445 | Method and apparatus for validating prefetched instruction | Lester Crudele, Michael E. Spak | 1988-07-12 |
| 4750110 | Method and apparatus for executing an instruction contingent upon a condition present in another data processor | David S. Mothersole, Douglas B. MacGregor | 1988-06-07 |
| 4740889 | Cache disable for a data processor | David S. Motersole, Jay A. Hartvigsen | 1988-04-26 |
| 4731736 | Method and apparatus for coordinating execution of an instruction by a selected coprocessor | David S. Mothersole, Douglas B. MacGregor | 1988-03-15 |
| 4729094 | Method and apparatus for coordinating execution of an instruction by a coprocessor | David S. Mothersole, Douglas B. MacGregor, William C. Moyer | 1988-03-01 |