Issued Patents All Time
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9081698 | Memory with selectively writable error correction codes and validity bits | — | 2015-07-14 |
| 8560892 | Memory with selectively writable error correction codes and validity bits | — | 2013-10-15 |
| 7050354 | Low-power compiler-programmable memory with fast access timing | — | 2006-05-23 |
| 6405160 | Memory compiler interface and methodology | Gregory Djaja, Douglas D. Smith, David W. Knebelsberger, Gary Hancock | 2002-06-11 |
| 6101145 | Sensing circuit and method | — | 2000-08-08 |
| 5406525 | Configurable SRAM and method for providing the same | — | 1995-04-11 |
| 5373203 | Decoder and latching circuit with differential outputs | Douglas D. Smith, David P. DiMarco | 1994-12-13 |
| 5289415 | Sense amplifier and latching circuit for an SRAM | David P. DiMarco, Douglas D. Smith | 1994-02-22 |
| 5289427 | Multiport memory with write priority detector | Douglas D. Smith | 1994-02-22 |