Issued Patents All Time
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6312983 | Etching method for reducing bit line coupling in a DRAM | Joseph Wu, Chen-Wei Chen, Nien-Yu Tsai | 2001-11-06 |
| 6214713 | Two step cap nitride deposition for forming gate electrodes | — | 2001-04-10 |
| 6187650 | Method for improving global planarization uniformity of a silicon nitride layer used in the formation of trenches by using a sandwich stop layer | Joseph Wu, Sheng Fen Chiu | 2001-02-13 |
| 6110812 | Method for forming polycide gate | Chiao-Lin Ho | 2000-08-29 |
| 5393686 | Method of forming gate oxide by TLC gettering clean | Wei-Kun Yeh, A. M. Chiang | 1995-02-28 |