Issued Patents All Time
Showing 1–25 of 31 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8533522 | Double data rate output circuit | Oswald Becca, Pedro Ovalle | 2013-09-10 |
| 8296598 | Double data rate output circuit and method | Oswald Becca, Pedro Ovalle | 2012-10-23 |
| RE43552 | Block programmable priority encoder in a cam | Sean Lord, Robert McKenzie, Dieter Haerle, Steven Smith | 2012-07-24 |
| 8069363 | Double data rate output latch for static RAM device has edge-triggered flip-flop to output DDR signal to synchronize with a second clock signal | Oswald Becca, Pedro Ovalle | 2011-11-29 |
| 8004868 | Method and apparatus for performing variable word width searches in a content addressable memory | — | 2011-08-23 |
| 7643324 | Method and apparatus for performing variable word width searches in a content addressable memory | — | 2010-01-05 |
| 7596710 | Synchronization circuit and method with transparent latches | Oswald Becca, Pedro Ovalle | 2009-09-29 |
| 7558909 | Method and apparatus for wide word deletion in content addressable memories | Robert McKenzie, Oswald Becca | 2009-07-07 |
| 7478193 | Method and apparatus for interconnecting content addressable memory devices | Oswald Becca, Robert McKenzie | 2009-01-13 |
| 7350137 | Method and circuit for error correction in CAM cells | Richard C. Foss | 2008-03-25 |
| 7334093 | Block programmable priority encoder in a CAM | Sean Lord, Robert McKenzie, Dieter Haerle, Steven Smith | 2008-02-19 |
| 7188211 | Block programmable priority encoder in a CAM | Sean Lord, Robert McKenzie, Dieter Haerle, Steven Smith | 2007-03-06 |
| 7136961 | Method and apparatus for wide word deletion in content addressable memories | Robert McKenzie, Oswald Becca | 2006-11-14 |
| 7062601 | Method and apparatus for interconnecting content addressable memory devices | Oswald Becca, Robert McKenzie | 2006-06-13 |
| 7042746 | Method and apparatus for performing variable word width searches in a content addressable memory | — | 2006-05-09 |
| 7010741 | Method and circuit for error correction in CAM cells | Richard C. Foss | 2006-03-07 |
| 7010713 | Synchronization circuit and method with transparent latches | Oswald Becca, Pedro Ovalle | 2006-03-07 |
| 6888731 | Method and apparatus for replacing defective rows in a semiconductor memory array | Douglas Perry, Richard C. Foss | 2005-05-03 |
| 6771525 | Method and apparatus for performing variable word width searches in a content addressable memory | — | 2004-08-03 |
| 6768659 | Circuit and method for reducing power usage in a content addressable memory | Peter B. Gillingham | 2004-07-27 |
| 6580652 | Priority encoder circuit and method for content addressable memory | Richard C. Foss | 2003-06-17 |
| 6563727 | Method and structure for reducing noise effects in content addressable memories | Hamed Ghassemi | 2003-05-13 |
| 6559544 | Programmable interconnect for semiconductor devices | Curtis Richardson | 2003-05-06 |
| 6504246 | Integrated circuit having a balanced twist for differential signal lines | Jon D. Baney | 2003-01-07 |
| 6430666 | Linked list memory and method therefor | — | 2002-08-06 |