Issued Patents All Time
Showing 226–248 of 248 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6061411 | Method and apparatus for synchronizing a serial bus clock to a serial bus function clock | — | 2000-05-09 |
| 6061794 | System and method for performing secure device communications in a peer-to-peer bus architecture | Michael F. Angelo, Sompong Paul Olarig, Dan Driscoll | 2000-05-09 |
| 6061687 | Linked lists of transfer descriptors scheduled at intervals | — | 2000-05-09 |
| 5911152 | Computer system and method for storing data in a buffer which crosses page boundaries utilizing beginning and ending buffer pointers | — | 1999-06-08 |
| 5832299 | System for emulating input/output devices utilizing processor with virtual system mode by allowing mode interpreters to operate concurrently on different segment registers | — | 1998-11-03 |
| 5832492 | Method of scheduling interrupts to the linked lists of transfer descriptors scheduled at intervals on a serial bus | — | 1998-11-03 |
| 5819051 | Low speed serial bus protocol and circuitry | David E. Murray | 1998-10-06 |
| 5802318 | Universal serial bus keyboard system | David E. Murray, Randall L. Hess, Christopher C. Wanner, Jeff W. Wolford | 1998-09-01 |
| 5791782 | Contact temperature probe with unrestrained orientation | Bruce Krein, Jianou Shi | 1998-08-11 |
| 5748940 | Secure updating of non-volatile memory | Michael F. Angelo, Craig Miller | 1998-05-05 |
| 5712875 | Asynchronous differential communication | — | 1998-01-27 |
| 5687388 | Scalable tree structured high speed input/output subsystem architecture | Craig Miller, Kevin B. Leigh, Robert Brett Costley, Christopher E. Simonich | 1997-11-11 |
| 5651130 | Memory controller that dynamically predicts page misses | Lee B. Hinkle, Gary W. Thome, Paul Santeler, John A. Landry | 1997-07-22 |
| 5644755 | Processor with virtual system mode | — | 1997-07-01 |
| 5621898 | Arbiter organization for serial bus transfers | — | 1997-04-15 |
| 5590292 | Scalable tree structured high speed input/output subsystem architecture | Craig Miller, Kevin B. Leigh, Robert Brett Costley, Christopher E. Simonich | 1996-12-31 |
| 5568621 | Cached subtractive decode addressing on a computer bus | — | 1996-10-22 |
| 5523755 | N-key rollover keyboard without diodes | — | 1996-06-04 |
| RE32682 | Folded bit line-shared sense amplifiers | Sargent S. Eaton, Jr. | 1988-05-31 |
| 4431927 | MOS Capacitive bootstrapping trigger circuit for a clock generator | Sargent S. Eaton, Jr. | 1984-02-14 |
| 4389715 | Redundancy scheme for a dynamic RAM | Sargent S. Eaton, Jr. | 1983-06-21 |
| 4351034 | Folded bit line-shared sense amplifiers | Sargent S. Eaton, Jr. | 1982-09-21 |
| 4344156 | High speed data transfer for a semiconductor memory | Sargent S. Eaton, Jr. | 1982-08-10 |