Issued Patents All Time
Showing 1–25 of 27 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11205722 | Lateral DMOS having reduced lateral size | Yanjie Lian | 2021-12-21 |
| 11069777 | Manufacturing method of self-aligned DMOS body pickup | Joel M. McGregor, Haifeng Yang, Deming Xiao | 2021-07-20 |
| 11049957 | LDMOS device with sinker link | Yanjie Lian, Daping Fu, Jin Xing | 2021-06-29 |
| 10090409 | Method for fabricating LDMOS with self-aligned body | Joel M. McGregor, Deming Xiao, Zeqiang Yao, Jeesung Jung | 2018-10-02 |
| 10090200 | Bipolar junction semiconductor device and method for manufacturing thereof | Yanjie Lian, Daping Fu | 2018-10-02 |
| 9941171 | Method for fabricating LDMOS with reduced source region | Joel M. McGregor, Eric Braun | 2018-04-10 |
| 9935176 | Method for fabricating LDMOS using CMP technology | Zeqiang Yao, Deming Xiao | 2018-04-03 |
| 9893170 | Manufacturing method of selectively etched DMOS body pickup | Jeesung Jung, Joel M. McGregor | 2018-02-13 |
| 9893146 | Lateral DMOS and the method for forming thereof | Eric Braun, Joel M. McGregor, Jeesung Jung | 2018-02-13 |
| 9583561 | Schottky diodes with mesh style region and associated methods | — | 2017-02-28 |
| 9502251 | Method for fabricating low-cost isolated resurf LDMOS and associated BCD manufacturing process | Joel M. McGregor, Jeesung Jung, Eric Braun | 2016-11-22 |
| 9219146 | High voltage PMOS and the method for forming thereof | Yanjie Lian | 2015-12-22 |
| 9159795 | High side DMOS and the method for forming thereof | Lei Zhang, Daping Fu, Yanjie Lian | 2015-10-13 |
| 9087774 | LDMOS device with short channel and associated fabrication method | Jeesung Jung, Joel M. McGregor | 2015-07-21 |
| 8916439 | Method for forming dual gate insulation layers and semiconductor device having dual gate insulation layers | Ze-Qiang Yao, Jeesung Jung, Haifeng Yang | 2014-12-23 |
| 8916913 | High voltage semiconductor device and the associated method of manufacturing | Lei Zhang | 2014-12-23 |
| 8809988 | Low leakage and/or low turn-on voltage Schottky diode | Martin E. Garnett | 2014-08-19 |
| 8772867 | High voltage high side DMOS and the method for forming thereof | Martin E. Garnett | 2014-07-08 |
| 8749014 | Schottky diodes with dual guard ring regions and associated methods | — | 2014-06-10 |
| 8198679 | High voltage NMOS with low on resistance and associated methods of making | — | 2012-06-12 |
| 7635621 | Lateral double-diffused metal oxide semiconductor (LDMOS) device with an enhanced drift region that has an improved Ron area product | Steve McCormack | 2009-12-22 |
| 7265041 | Gate layouts for transistors | Schyi-yi Wu | 2007-09-04 |
| 6838350 | Triply implanted complementary bipolar transistors | Martin E. Garnett, Peter Zhang, Steve McCormack | 2005-01-04 |
| 6114208 | Method for fabricating complementary MOS transistor | Seung Jin Park | 2000-09-05 |
| 5965919 | Semiconductor device and a method of fabricating the same | — | 1999-10-12 |