Issued Patents All Time
Showing 51–62 of 62 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6237084 | Processor which can favorably execute a rounding process composed of positive conversion and saturated calculation processing | Toru Morikawa, Nobuo Higaki, Keizo Sumida | 2001-05-22 |
| 5974540 | Processor which can favorably execute a rounding process composed of positive conversion and saturated calculation processing | Toru Morikawa, Nobuo Higaki, Keizo Sumida | 1999-10-26 |
| 5903470 | Method and apparatus for automatically designing logic circuit, and multiplier | Tamotsu Nishiyama | 1999-05-11 |
| 5835505 | Semiconductor integrated circuit and system incorporating the same | Yoshito Nishimichi, Satoshi Ogura, Shinji Ozaki, Seiji Tokunoh, Hiroaki Yamamoto +1 more | 1998-11-10 |
| 5808928 | Arithmetic processing apparatus | — | 1998-09-15 |
| 5570309 | Iterative arithmetic processor | Yuiti Hashimoto | 1996-10-29 |
| 5497473 | Control circuit for controlling a cache memory divided into a plurality of banks | Shirou Yoshioka | 1996-03-05 |
| 5379244 | Small-sized, low power consumption multiplication processing device with a rounding recoding circuit for performing high speed iterative multiplication | Takashi Taniguchi | 1995-01-03 |
| 5289398 | Small-sized low power consumption multiplication processing device with a rounding recording circuit for performing high speed iterative multiplication | Takashi Taniguchi | 1994-02-22 |
| 5282156 | Leading one anticipator and floating point addition/subtraction apparatus employing same | Takashi Taniguchi | 1994-01-25 |
| 5278283 | Process for preparing polyarylene sulfides of increased molecular weight | Minoru Senga | 1994-01-11 |
| 5146419 | Floating point addition-subtraction apparatus | Takashi Taniguchi | 1992-09-08 |