Issued Patents All Time
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6480875 | Adder circuit and associated layout structure | Akira Miyoshi, Hiroaki Yamamoto | 2002-11-12 |
| 5941937 | Layout structure for barrel shifter with decode circuit | Hiroaki Yamamoto | 1999-08-24 |
| 5907694 | Data processing apparatus for performing a pipeline operation on a load and extension instruction | Masato Suzuki, Nobuo Higaki, Shinya Miyaji, Nobuki Tominaga | 1999-05-25 |
| 5835505 | Semiconductor integrated circuit and system incorporating the same | Satoshi Ogura, Shinji Ozaki, Seiji Tokunoh, Akira Miyoshi, Hiroaki Yamamoto +1 more | 1998-11-10 |
| 5829021 | System for controlling operating timing of a cache memory | Hiroaki Yamamoto, Shinji Ozaki | 1998-10-27 |
| 5754813 | Data processor | Hiroaki Yamamoto, Shinji Ozaki | 1998-05-19 |
| 5347232 | Phase locked loop clock generator | — | 1994-09-13 |
| 5287025 | Timing control circuit | — | 1994-02-15 |
| 4779234 | First-in-first-out memory capable of simultaneous readings and writing operations | Katsuyuki Kaneko, Masaru Uya | 1988-10-18 |
| 4709173 | Integrated circuit having latch circuit with multiplexer selection function | Masaru Uya, Katsuyuki Kaneko | 1987-11-24 |