Issued Patents All Time
Showing 26–37 of 37 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6424579 | Semiconductor memory device with internal power supply potential generation circuit | Mihoko Akiyama, Akira Yamazaki, Fukashi Morishita, Nobuyuki Fujii, Mako Okamoto | 2002-07-23 |
| 6414881 | Semiconductor device capable of generating internal voltage effectively | Nobuyuki Fujii, Fukashi Morishita, Akira Yamazaki, Mihoko Akiyama, Mako Kobayashi | 2002-07-02 |
| 6373763 | Semiconductor memory provided with data-line equalizing circuit | Akira Yamazaki, Fukashi Morishita, Nobuyuki Fujii, Mako Okamoto | 2002-04-16 |
| 6344766 | Voltage level converter circuit improved in operation reliability | Masaaki Mihara | 2002-02-05 |
| 6317368 | Semiconductor integrated circuit device tested in batches | Takeshi Hamamoto, Tetsuo Kato | 2001-11-13 |
| 6304120 | Buffer circuit operating with a small through current and potential detecting circuit using the same | — | 2001-10-16 |
| 6198331 | Voltage level converter circuit improved in operation reliability | Masaaki Mihara | 2001-03-06 |
| 6049243 | Voltage level converter circuit improved in operation reliability | Masaaki Mihara | 2000-04-11 |
| 6008674 | Semiconductor integrated circuit device with adjustable high voltage detection circuit | Tomohisa Wada, Masaaki Mihara, Yoshikazu Miyawaki, Katsumi Dosaka | 1999-12-28 |
| 5872476 | Level converter circuit generating a plurality of positive/negative voltages | Masaaki Mihara | 1999-02-16 |
| 5852583 | Semiconductor memory device that can realize high speed data read out | Shinji Kawai, Shinichi Kobayashi, Akinori Matsuo, Masashi Wada | 1998-12-22 |
| 5828604 | Non-volatile semiconductor memory device having large margin of readout operation for variation in external power supply voltage | Shinji Kawai, Shinichi Kobayashi | 1998-10-27 |