Issued Patents All Time
Showing 51–63 of 63 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6314021 | Nonvolatile semiconductor memory device and semiconductor integrated circuit | Shigenobu Maeda, Takuji Matsumoto | 2001-11-06 |
| 6303483 | Method of manufacturing semiconductor device | — | 2001-10-16 |
| 6285079 | Semiconductor device employing grid array electrodes and compact chip-size package | — | 2001-09-04 |
| 6222217 | Semiconductor device and manufacturing method thereof | — | 2001-04-24 |
| 6096641 | Method of manufacturing semiconductor device | — | 2000-08-01 |
| 5854509 | Method of fabricating semiconductor device and semiconductor device | — | 1998-12-29 |
| 5845105 | Method of simulating semiconductor manufacture with process functions according to user application | Katsumi Eikyu, Kenichiro Sonoda, Masato Fujinaga, Kiyoshi Ishikawa, Norihiko Kotani | 1998-12-01 |
| 5736438 | Field effect thin-film transistor and method of manufacturing the same as well as semiconductor device provided with the same | Hisayuki Nishimura, Kazuyuki Sugahara, Shigenobu Maeda, Takashi Ipposhi, Yasuo Inoue +4 more | 1998-04-07 |
| 5668403 | Semiconductor device with reduced leakage current | — | 1997-09-16 |
| 5627772 | Method and apparatus for device simulation | Kenichiro Sonoda | 1997-05-06 |
| 5514880 | Field effect thin-film transistor for an SRAM with reduced standby current | Hisayuki Nishimura, Kazuyuki Sugahara, Shigenobu Maeda, Takashi Ipposhi, Yasuo Inoue +4 more | 1996-05-07 |
| 5070469 | Topography simulation method | Masato Fujinaga, Norihiko Kotani | 1991-12-03 |
| 5067101 | Topography simulation method | Masato Fujinaga, Norihiko Kotani | 1991-11-19 |