Issued Patents All Time
Showing 1–21 of 21 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10379069 | Magnetism measuring device | Yuji Hatano, Jun UENO, Keiro Komatsu | 2019-08-13 |
| 6577979 | Semiconductor integrated circuit with IP test circuit | — | 2003-06-10 |
| 6380567 | Semiconductor device and fabrication method thereof | — | 2002-04-30 |
| 6343366 | BIST circuit for LSI memory | — | 2002-01-29 |
| 6297662 | Semiconductor device | — | 2001-10-02 |
| 6020902 | Image data storing method and image data storing device | — | 2000-02-01 |
| 5534805 | Synchronized clock generating apparatus | Yukio Miyazaki, Makoto Hatakenaka, Junji Mano | 1996-07-09 |
| 5491438 | Synchronized clock generating apparatus | Yukio Miyazaki, Makoto Hatakenaka, Junji Mano | 1996-02-13 |
| 5424995 | Static random access memory allowing reading angle rotation | Yukio Miyazaki | 1995-06-13 |
| 5386390 | Semiconductor memory with looped shift registers as row and column drivers | — | 1995-01-31 |
| 5208773 | Semiconductor memory device having bit lines and word lines different in data reading and data writing | Yasunori Maeda, Yukio Miyazaki | 1993-05-04 |
| 5206834 | Semiconductor memory device performing last in-first out operation and the method for controlling the same | Yasunori Maeda | 1993-04-27 |
| 5140194 | Driver circuit apparatus with means for reducing output ringing | — | 1992-08-18 |
| 5103423 | Dynamic random access memory and a method of operating the same | Yukio Miyazaki, Yasunori Maeda | 1992-04-07 |
| 5075577 | Tristate output circuit with input protection | — | 1991-12-24 |
| 4858055 | Input protecting device for a semiconductor circuit device | — | 1989-08-15 |
| 4851721 | Semiconductor integrated circuit | — | 1989-07-25 |
| 4837463 | Three-state complementary field effect integrated circuit | Yukio Miyazaki | 1989-06-06 |
| 4806802 | CMOS circuit having shoot through current control | Yukio Miyazaki | 1989-02-21 |
| 4804867 | Three-state complementary MOS integrated circuit | Yukio Miyazaki | 1989-02-14 |
| 4794276 | Latch circuit tolerant of undefined control signals | Tatsuyoshi Sasada | 1988-12-27 |