Issued Patents All Time
Showing 76–100 of 181 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7047461 | Semiconductor integrated circuit device with test data output nodes for parallel test results output | Takeshi Fujino, Atsuo Mangyo | 2006-05-16 |
| 7030681 | Semiconductor device with multiple power sources | Fukashi Morishita, Yasuhiko Taito, Nobuyuki Fujii, Mako Okamoto | 2006-04-18 |
| 7028397 | Method of attaching a semiconductor chip to a chip mounting substrate | Shunichi Abe, Tetsuya Uebayashi, Naoki Izumi | 2006-04-18 |
| 7009781 | Zoom lens mechanism partly foldable and retractable | Atsushi Oshima, Yasutaka Koga | 2006-03-07 |
| 6995468 | Semiconductor apparatus utilizing a preparatory stage for a chip assembly | Shunichi Abe, Tetsuya Uebayashi, Naoki Izumi | 2006-02-07 |
| 6965154 | Semiconductor device | Shunichi Abe, Tetsuya Uebayashi, Naoki Izumi | 2005-11-15 |
| 6867507 | Lead frame | Tetsuya Uebayashi, Shunichi Abe, Naoki Izumi | 2005-03-15 |
| 6862247 | Pseudo-static synchronous semiconductor memory device | — | 2005-03-01 |
| 6807116 | Semiconductor circuit device capable of accurately testing embedded memory | Atsuo Mangyo | 2004-10-19 |
| 6798701 | Semiconductor integrated circuit device having data input/output configuration variable | — | 2004-09-28 |
| 6784021 | Semiconductor device, method of fabricating the same and semiconductor device fabricating apparatus | Shunichi Abe, Tetsuya Uebayashi, Naoki Izumi | 2004-08-31 |
| 6781903 | Semiconductor memory device with power consumption reduced in non-data-access | Atsuo Mangyo, Masaru Haraguchi | 2004-08-24 |
| 6781431 | Clock generating circuit | Yasuhiko Taito, Fukashi Morishita, Nobuyuki Fujii, Mihoko Akiyama, Mako Okamoto | 2004-08-24 |
| 6777707 | Semiconductor integrated circuit with voltage down converter adaptable for burn-in testing | Mihoko Akiyama, Fukashi Morishita, Yasuhiko Taito, Nobuyuki Fujii, Mako Okamoto | 2004-08-17 |
| 6768354 | Multi-power semiconductor integrated circuit device | Fukashi Morishita, Yasuhiko Taito, Nobuyuki Fujii, Mihoko Akiyama, Mako Kobayashi | 2004-07-27 |
| 6737736 | Semiconductor device | Shunichi Abe, Tetsuya Uebayashi, Naoki Izumi | 2004-05-18 |
| 6700434 | Substrate bias voltage generating circuit | Nobuyuki Fujii, Fukashi Morishita, Mihoko Akiyama, Mako Kobayashi, Yasuhiko Taito | 2004-03-02 |
| 6665217 | Semiconductor memory device including internal power circuit having tuning function | Fukashi Morishita, Yasuhiko Taito, Mako Okamoto, Nobuyuki Fujii | 2003-12-16 |
| 6614270 | Potential detecting circuit having wide operating margin and semiconductor device including the same | Mako Okamoto, Yasuhiko Taito, Fukashi Morishita, Mihoko Akiyama, Nobuyuki Fujii | 2003-09-02 |
| 6593642 | Semiconductor device provided with potential transmission line | Mako Okamoto, Yasuhiko Taito, Fukashi Morishita, Nobuyuki Fujii | 2003-07-15 |
| 6515461 | Voltage downconverter circuit capable of reducing current consumption while keeping response rate | Mihoko Akiyama, Fukashi Morishita, Yasuhiko Taito, Mako Kobayashi, Nobuyuki Fujii | 2003-02-04 |
| 6507532 | Semiconductor memory device having row-related circuit operating at high speed | Takeshi Fujino, Kazunari Inoue, Kazutami Arimoto | 2003-01-14 |
| 6501326 | Semiconductor integrated circuit | Nobuyuki Fujii, Fukashi Morishita, Yasuhiko Taito, Mako Okamoto | 2002-12-31 |
| 6472926 | Internal voltage generation circuit | Yasuhiko Taito, Fukashi Morishita, Mako Kobayashi, Mihoko Akiyama, Nobuyuki Fujii | 2002-10-29 |
| 6434661 | Synchronous semiconductor memory including register for storing data input and output mode information | Yasuhiro Konishi, Katsumi Dosaka, Kouji Hayano, Masaki Kumanoya, Hisashi Iwamoto | 2002-08-13 |