Issued Patents All Time
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6812536 | MOSFET with graded gate oxide layer | Shuichi Ueno, Yukio Nishida, Hiroshi Umeda, Kenichi Ohto, Takashi Terauchi +1 more | 2004-11-02 |
| 6787878 | Semiconductor device having a potential fuse, and method of manufacturing the same | Yukihiro Nagai, Tomoharu Mametani, Yoji Nakata, Shigenori Kido, Takeshi Kishida +2 more | 2004-09-07 |
| 6744143 | Semiconductor device having test mark | Jiro Matsufusa, Tomoharu Mametani, Takeshi Kishida, Yoji Nakata, Yukihiro Nagai +2 more | 2004-06-01 |
| 6673671 | Semiconductor device, and method of manufacturing the same | Hiroaki Nishimura, Tomoharu Mametani, Yukihiro Nagai, Takeshi Kishida | 2004-01-06 |
| 6512261 | Method of fabricating a semiconductor device and the semiconductor device with a capacitor structure having increased capacitance | — | 2003-01-28 |
| 6337268 | Method of manufacturing contact structure | Shigenori Kido, Jiro Matsufusa, Tomoharu Mametani, Yoji Nakata, Takeshi Kishida +2 more | 2002-01-08 |
| 6313005 | Method of manufacturing semiconductor device | Takeshi Kishida, Yoji Nakata, Tomoharu Mametani, Shigenori Kido, Yukihiro Nagai +2 more | 2001-11-06 |
| 6251741 | Method of manufacturing a semiconductor device | Tomoharu Mametani, Yukihiro Nagai, Hiroaki Nishimura, Takeshi Kishida | 2001-06-26 |