Issued Patents All Time
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6939777 | Method for manufacturing semiconductor device | Takashi Terauchi | 2005-09-06 |
| 6812536 | MOSFET with graded gate oxide layer | Shuichi Ueno, Yukio Nishida, Hiroshi Umeda, Takashi Terauchi, Shigeru Shiratake +1 more | 2004-11-02 |