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Method and apparatus for reducing signal processing requirements for transmitting packet-based data |
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2008-07-29 |
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Programmable identity of I and Q channels |
— |
2008-04-22 |
| 7254116 |
Method and apparatus for transceiver noise reduction in a frame-based communications network |
Dane Snow, Jason A. Trachewsky, Larry C. Yamano |
2007-08-07 |
| 7054279 |
Method and apparatus for optimizing signal transformation in a frame-based communications network |
Dane Snow, Jason A. Trachewsky |
2006-05-30 |
| 6445731 |
Method and apparatus for reducing signal processing requirements for transmitting packet-based data with a modem |
Larry C. Yamano, John T. Holloway, Edward H. Frank, Tracy D. Mallory, Alan Corry +3 more |
2002-09-03 |
| 6304596 |
Method and apparatus for reducing signal processing requirements for transmitting packet-based data with a modem |
Larry C. Yamano, John T. Holloway, Edward H. Frank, Tracy D. Mallory, Alan Corry +3 more |
2001-10-16 |
| 6269136 |
Digital differential analyzer data synchronizer |
Craig Hansen |
2001-07-31 |
| 6075814 |
Method and apparatus for reducing signal processing requirements for transmitting packet-based data with a modem |
Larry C. Yamano, John T. Holloway, Edward H. Frank, Tracy D. Mallory, Alan Corry +3 more |
2000-06-13 |
| 5867735 |
Method for storing prioritized memory or I/O transactions in queues having one priority level less without changing the priority when space available in the corresponding queues exceed |
William K. Zuravleff, Mark Semmelmeyer, Scott Furman |
1999-02-02 |
| 5812799 |
Non-blocking load buffer and a multiple-priority memory system for real-time multiprocessing |
William K. Zuravleff, Mark Semmelmeyer, Scott Furman |
1998-09-22 |
| 5778419 |
DRAM with high bandwidth interface that uses packets and arbitration |
Craig Hansen, Alan Corry |
1998-07-07 |
| 5737547 |
System for placing entries of an outstanding processor request into a free pool after the request is accepted by a corresponding peripheral device |
William K. Zuravleff, Mark Semmelmeyer, Scott Furman |
1998-04-07 |
| 5630096 |
Controller for a synchronous DRAM that maximizes throughput by allowing memory requests and commands to be issued out of order |
William K. Zuravleff |
1997-05-13 |
| 5410670 |
Accessing system that reduces access times due to transmission delays and I/O access circuitry in a burst mode random access memory |
Craig Hansen, John G. Campbell |
1995-04-25 |
