Issued Patents All Time
Showing 126–142 of 142 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6128237 | Method and apparatus for enhancing the performance of semiconductor memory devices | Brian M. Shirley | 2000-10-03 |
| 6104651 | Testing parameters of an electronic device | Jeffrey P. Wright | 2000-08-15 |
| 6094388 | Methods of identifying defects in an array of memory cells and related integrated circuitry | — | 2000-07-25 |
| 6049502 | Method for writing to multiple banks of a memory device | Jeffrey P. Wright | 2000-04-11 |
| 6026042 | Method and apparatus for enhancing the performance of semiconductor memory devices | Brian M. Shirley | 2000-02-15 |
| 5999481 | Method and apparatus for controlling the operation of an integrated circuit responsive to out-of-synchronism control signals | Jeffrey P. Wright, Hua Zheng | 1999-12-07 |
| 5995426 | Testing parameters of an electronic device | Jeffery P. Wright | 1999-11-30 |
| 5959929 | Method for writing to multiple banks of a memory device | Jeffrey P. Wright | 1999-09-28 |
| 5945840 | Low current redundancy anti-fuse assembly | Steven G. Renfro | 1999-08-31 |
| 5946265 | Continuous burst EDO memory device | — | 1999-08-31 |
| 5940315 | Strapped wordline architecture for semiconductor memory | — | 1999-08-17 |
| 5936901 | Shared data lines for memory write and memory test operations | Victor Wong, Charles L. Ingalls, Jeffrey P. Wright | 1999-08-10 |
| 5745429 | Memory having and method for providing a reduced access time | Troy A. Manning, Todd A. Merritt | 1998-04-28 |
| 5729504 | Continuous burst edo memory device | — | 1998-03-17 |
| 5663658 | Low current redundancy fuse assembly | Steven G. Renfro | 1997-09-02 |
| 5508638 | Low current redundancy fuse assembly | Steven G. Renfro | 1996-04-16 |
| 5424672 | Low current redundancy fuse assembly | Steven G. Renfro | 1995-06-13 |