Issued Patents All Time
Showing 26–37 of 37 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8717796 | Memory dies, stacked memories, memory devices and methods | Yutaka Ito | 2014-05-06 |
| 8520452 | Data bus power-reduced semiconductor storage apparatus | Zer Liang | 2013-08-27 |
| 8437163 | Memory dies, stacked memories, memory devices and methods | Yutaka Ito | 2013-05-07 |
| 8386886 | Method, system, and apparatus for distributed decoding during prolonged refresh | Yutaka Ito | 2013-02-26 |
| 8223583 | Row addressing | Takumi Nasu, Yoshinori Fujiwara | 2012-07-17 |
| 8194474 | Data bus power-reduced semiconductor storage apparatus | Zer Liang | 2012-06-05 |
| 8068380 | Block repair scheme | Takumi Nasu | 2011-11-29 |
| 8042022 | Method, system, and apparatus for distributed decoding during prolonged refresh | Yutaka Ito | 2011-10-18 |
| 8004909 | Data bus power-reduced semiconductor storage apparatus | Zer Liang | 2011-08-23 |
| 7933162 | Row addressing | Takumi Nasu, Yoshinori Fujiwara | 2011-04-26 |
| 7746710 | Data bus power-reduced semiconductor storage apparatus | Zer Liang | 2010-06-29 |
| 7515501 | Memory architecture having local column select lines | Shinji Bessho, Takumi Nasu, Koichiro Ito | 2009-04-07 |