| 12254213 |
Write request buffer capable of responding to read requests |
Nikesh Agarwal, Robert M. Walker |
2025-03-18 |
| 12182442 |
Request control for memory sub-systems |
— |
2024-12-31 |
| 12112786 |
Command scheduling component for memory |
Patrick A. La Fratta, Jeffrey L. Scott, Robert M. Walker |
2024-10-08 |
| 11886348 |
Interleaved cache prefetching |
Robert M. Walker, Cagdas Dirik |
2024-01-30 |
| 11854600 |
Write request thresholding |
Nikesh Agarwal, Kirthi Ravindra Kulkarni |
2023-12-26 |
| 11847058 |
Using a second content-addressable memory to manage memory burst accesses in memory sub-systems |
Dhawal Bavishi, Jeffrey E. Frederiksen |
2023-12-19 |
| 11836096 |
Memory-flow control register |
Nikesh Agarwal, Robert M. Walker |
2023-12-05 |
| 11809710 |
Outstanding transaction monitoring for memory sub-systems |
Dhawal Bavishi, Robert M. Walker |
2023-11-07 |
| 11782851 |
Dynamic queue depth adjustment |
Robert M. Walker, Kirthi Ravindra Kulkarni |
2023-10-10 |
| 11604749 |
Direct memory access (DMA) commands for noncontiguous source and destination memory addresses |
Dhawal Bavishi |
2023-03-14 |
| 11599472 |
Interleaved cache prefetching |
Robert M. Walker, Cagdas Dirik |
2023-03-07 |
| 11593024 |
Request control for memory sub-systems |
— |
2023-02-28 |
| 11461256 |
Quality of service levels for a direct memory access engine in a memory sub-system |
Dhawal Bavishi |
2022-10-04 |
| 11442867 |
Using a second content-addressable memory to manage memory burst accesses in memory sub-systems |
Dhawal Bavishi, Jeffrey E. Frederiksen |
2022-09-13 |
| 11301383 |
Managing processing of memory commands in a memory subsystem with a high latency backing store |
Patrick A. La Fratta, Cagdas Dirik, Robert M. Walker |
2022-04-12 |
| 11175859 |
Managing memory commands in a memory subsystem by adjusting a maximum number of low priority commands in a DRAM controller |
Patrick A. La Fratta, Robert M. Walker |
2021-11-16 |
| 11086808 |
Direct memory access (DMA) commands for noncontiguous source and destination memory addresses |
Dhawal Bavishi |
2021-08-10 |
| 10990548 |
Quality of service levels for a direct memory access engine in a memory sub-system |
Dhawal Bavishi |
2021-04-27 |