Patent Leaderboard
USPTO Patent Rankings Data through Sept 30, 2025
KB

Kris K. Brown

Micron: 40 patents #475 of 6,345Top 8%
PIPiksel: 1 patents #33 of 42Top 80%
Garden City, ID: #1 of 24 inventorsTop 5%
Idaho: #348 of 8,810 inventorsTop 4%
Overall (All Time): #76,538 of 4,157,543Top 2%
41 Patents All Time

Issued Patents All Time

Showing 26–41 of 41 patents

Patent #TitleCo-InventorsDate
6545308 Funnel shaped structure in polysilicon David J. Keller, Louie Liu 2003-04-08
6432765 Funnel shaped structure in polysilicon and method of making David J. Keller, Louie Liu 2002-08-13
6410948 Memory cell arrays comprising intersecting slanted portions Luan C. Tran, D. Mark Duncan, Tyler Lowrey, Rob B. Kerr 2002-06-25
6380026 Processing methods of forming integrated circuitry memory devices, methods of forming DRAM arrays, and related semiconductor masks 2002-04-30
6271558 Capacitors and capacitor construction Gurtej S. Sandhu 2001-08-07
6235578 Processing methods of forming integrated circuitry memory devices, methods of forming DRAM arrays, and related semiconductor masks 2001-05-22
6103570 Method of forming capacitors having an amorphous electrically conductive layer Gurtej S. Sandhu 2000-08-15
6025221 Processing methods of forming integrated circuitry memory devices, methods of forming DRAM arrays, and related semiconductor masks 2000-02-15
6018173 Vertically oriented capacitor structure with sloped contact opening and method for etching sloped contact openings in polysilicon David J. Keller, Louie Liu 2000-01-25
6010930 Vertically oriented structure with sloped opening and method for etching David J. Keller, Louie Liu 2000-01-04
5854734 Capacitor construction Gurtej S. Sandhu 1998-12-29
5812360 Capacitor construction having an amorphous electrically conductive layer Gurtej S. Sandhu 1998-09-22
5665625 Method of forming capacitors having an amorphous electrically conductive layer Gurtej S. Sandhu 1997-09-09
5652170 Method for etching sloped contact openings in polysilicon David J. Keller, Louie Liu 1997-07-29
5608247 Storage capacitor structures using CVD tin on hemispherical grain silicon 1997-03-04
5418180 Process for fabricating storage capacitor structures using CVD tin on hemispherical grain silicon 1995-05-23