Issued Patents All Time
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7268402 | Memory cell with trench-isolated transistor including first and second isolation trenches | Hirokazu Ueda, Hiroyuki Watanabe | 2007-09-11 |
| 6894354 | Trench isolated transistors, trench isolation structures, memory cells, and DRAMs | Hirokazu Ueda, Hiroyuki Watanabe | 2005-05-17 |
| 6830977 | METHODS OF FORMING AN ISOLATION TRENCH IN A SEMICONDUCTOR, METHODS OF FORMING AN ISOLATION TRENCH IN A SURFACE OF A SILICON WAFER, METHODS OF FORMING AN ISOLATION TRENCH-ISOLATED TRANSISTOR, TRENCH-ISOLATED TRANSISTOR, TRENCH ISOLATION STRUCTURES FORMED IN A SEMICONDUCTOR, MEMORY CELLS AND DRAMS | Hirokazu Ueda, Hiroyuki Watanabe | 2004-12-14 |