Issued Patents All Time
Showing 26–39 of 39 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10910033 | Refresh-related activation in memory | Stephen Michael Kaminski, Anthony D. Veches, James S. Rehmeyer, Debra M. Bell, Dale H. Hiscock | 2021-02-02 |
| 10885967 | Systems and methods for improving power efficiency in refreshing memory banks | James S. Rehmeyer, Debra M. Bell, George B. Raad, Brian Callaway | 2021-01-05 |
| 10818336 | Apparatus with a row hit rate/refresh management mechanism | — | 2020-10-27 |
| 10803926 | Memory with on-die data transfer | Dale H. Hiscock, Debra M. Bell, Michael Kaminski, Anthony D. Veches, James S. Rehmeyer | 2020-10-13 |
| 10762946 | Memory with partial array refresh | Dale H. Hiscock, Debra M. Bell, Michael Kaminski, Anthony D. Veches, James S. Rehmeyer | 2020-09-01 |
| 10712389 | Scan chain operations | — | 2020-07-14 |
| 10672496 | Devices and methods to write background data patterns in memory devices | Gary L. Howe, Harish N. Venkata | 2020-06-02 |
| 10504577 | Apparatus with a row hit rate/refresh management mechanism | — | 2019-12-10 |
| 10388334 | Scan chain operation in sensing circuitry | Debra M. Bell | 2019-08-20 |
| 10162005 | Scan chain operations | — | 2018-12-25 |
| 10037785 | Scan chain operation in sensing circuitry | Debra M. Bell | 2018-07-31 |
| 9305625 | Apparatuses and methods for unit identification in a master/slave memory stack | Anthony D. Veches, Dennis R. Blankenship | 2016-04-05 |
| 8817547 | Apparatuses and methods for unit identification in a master/slave memory stack | Anthony D. Veches, Dennis R. Blankenship | 2014-08-26 |
| 7847626 | Structure and method for coupling signals to and/or from stacked semiconductor dies | Beau D. Barry | 2010-12-07 |