Issued Patents All Time
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9305625 | Apparatuses and methods for unit identification in a master/slave memory stack | Anthony D. Veches, Joshua E. Alzheimer | 2016-04-05 |
| 8817547 | Apparatuses and methods for unit identification in a master/slave memory stack | Anthony D. Veches, Joshua E. Alzheimer | 2014-08-26 |
| 7872936 | System and method for packaged memory | — | 2011-01-18 |
| 6157990 | Independent chip select for SRAM and DRAM in a multi-port RAM | William L. Randolph, Rhonda Cassada | 2000-12-05 |
| 5838606 | Three-transistor static storage cell | Stephen Mann | 1998-11-17 |
| 5798972 | High-speed main amplifier with reduced access and output disable time periods | Tim Lao, Rhonda Cassada | 1998-08-25 |
| 5784329 | Latched DRAM write bus for quickly clearing DRAM array with minimum power usage | Tim Lao, Rhonda Cassada | 1998-07-21 |
| 5680365 | Shared dram I/O databus for high speed operation | — | 1997-10-21 |
| 5486785 | CMOS level shifter with feedforward control to prevent latching in a wrong logic state | — | 1996-01-23 |