Issued Patents All Time
Showing 51–63 of 63 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7671648 | System and method for an accuracy-enhanced DLL during a measure initialization mode | — | 2010-03-02 |
| 7656745 | Circuit, system and method for controlling read latency | — | 2010-02-02 |
| 7642827 | Apparatus and method for multi-phase clock generation | — | 2010-01-05 |
| 7629819 | Seamless coarse and fine delay structure for high performance DLL | Kang-Yong Kim | 2009-12-08 |
| 7622908 | Built-in system and method for testing integrated circuit timing parameters | — | 2009-11-24 |
| 7554375 | Delay line circuit | — | 2009-06-30 |
| 7541851 | Control of a variable delay line using line entry point to modify line power supply voltage | Tyler Gomm, Kang-Yong Kim | 2009-06-02 |
| 7443216 | Trimmable delay locked loop circuitry with improved initialization characteristics | Tyler Gomm, Eric Booth | 2008-10-28 |
| 7423456 | Fast response time, low power phase detector circuits, devices and systems incorporating the same, and associated methods | Tyler Gomm | 2008-09-09 |
| 7417478 | Delay line circuit | Kang-Yong Kim | 2008-08-26 |
| 7362634 | Built-in system and method for testing integrated circuit timing parameters | — | 2008-04-22 |
| 7276951 | Delay line circuit | — | 2007-10-02 |
| 7227809 | Clock generator having a delay locked loop and duty cycle correction circuit in a parallel configuration | — | 2007-06-05 |