Issued Patents All Time
Showing 51–75 of 94 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6838337 | Sense amplifier and architecture for open digit arrays | — | 2005-01-04 |
| 6819621 | Method and apparatus for standby power reduction in semiconductor devices | Jeff Koelling, Jon Morris, Rishad Omer | 2004-11-16 |
| 6721221 | Sense amplifier and architecture for open digit arrays | — | 2004-04-13 |
| 6707729 | Physically alternating sense amplifier activation | — | 2004-03-16 |
| 6690606 | Asynchronous interface circuit and method for a pseudo-static memory device | Simon J. Lovett, Cliff Zitlaw, Brian M. Shirley, Roger D. Norwood | 2004-02-10 |
| 6614711 | Row decoder scheme for flash memory devices | — | 2003-09-02 |
| 6556503 | Methods and apparatus for reducing decoder area | — | 2003-04-29 |
| 6512705 | Method and apparatus for standby power reduction in semiconductor devices | Jeff Koelling, Jon Morris, Rishad Omer | 2003-01-28 |
| 6049483 | Nonvolatile memory device having program and/or erase voltage clamp | David J. McElroy, Brian W. Huber | 2000-04-11 |
| 5835395 | Eprom pinout option | Richard A. Bussey | 1998-11-10 |
| 5636226 | Fault sensing circuit and method | Phat C. Truong | 1997-06-03 |
| 5513064 | Method and device for improving I/O ESD tolerance | — | 1996-04-30 |
| 5491658 | Column decoder for virtual ground memory array | Phat C. Truong | 1996-02-13 |
| 5412603 | Method and circuitry for programming floating-gate memory cell using a single low-voltage supply | Cetin Kaya, David J. McElroy | 1995-05-02 |
| 5365486 | Method and circuitry for refreshing a flash electrically erasable, programmable read only memory | — | 1994-11-15 |
| 5313432 | Segmented, multiple-decoder memory array and method for programming a memory array | Sung-Wei Lin, Phat C. Truong, David J. McElroy, Harvey J. Stiegler, Benjamin H. Ashmore, Jr. +1 more | 1994-05-17 |
| 5313427 | EEPROM array with narrow margin of voltage thresholds after erase | David J. McElroy, Pradeep L. Shah | 1994-05-17 |
| 5311480 | Method and apparatus for EEPROM negative voltage wordline decoding | — | 1994-05-10 |
| 5287315 | Skewed reference to improve ones and zeros in EPROM arrays | Debra J. Dolby, David J. McElroy, Eddie Hearl Breashears, John Howard MacPeak | 1994-02-15 |
| 5287536 | Nonvolatile memory array wordline driver circuit with voltage translator circuit | Phat C. Truong, Benjamin H. Ashmore, Jr., Harvey J. Steigler | 1994-02-15 |
| 5287310 | Memory with I/O mappable redundant columns | Phat C. Troung | 1994-02-15 |
| 5278458 | Threshold/voltage detection circuit | Wayland Bart Holland, Gary L. Howe | 1994-01-11 |
| 5197029 | Common-line connection for integrated memory array | Phat C. Truong | 1993-03-23 |
| 5182726 | Circuit and method for discharging a memory array | Phat C. Truong | 1993-01-26 |
| 5170077 | Voltage level detecting circuit | — | 1992-12-08 |