Issued Patents All Time
Showing 51–60 of 60 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5774022 | Digital clock recovery loop | Dan M. Griffin, George E. Pax | 1998-06-30 |
| 5751647 | On-chip memory redundancy circuitry for programmable non-volatile memories, and methods for programming same | — | 1998-05-12 |
| 5648934 | On-chip memory redundancy circuitry for programmable non-volatile memories, and methods for programming same | — | 1997-07-15 |
| 5513144 | On-chip memory redundancy circuitry for programmable non-volatile memories, and methods for programming same | — | 1996-04-30 |
| 5355028 | Lower power CMOS buffer amplifier for use in integrated circuit substrate bias generators | — | 1994-10-11 |
| 5212442 | Forced substrate test mode for packaged integrated circuits | Brian P. Higgins | 1993-05-18 |
| 5032892 | Depletion mode chip decoupling capacitor | Wen-Foo Chern, Ward Parkinson, Thomas Trent, Kevin G. Duesman | 1991-07-16 |
| 4586170 | Semiconductor memory redundant element identification circuit | Robert J. Proebsting | 1986-04-29 |
| 4418403 | Semiconductor memory cell margin test circuit | Robert J. Proebsting | 1983-11-29 |
| 4338679 | Row driver circuit for semiconductor memory | — | 1982-07-06 |