Issued Patents All Time
Showing 76–100 of 116 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6190972 | Method for storing information in a semiconductor device | Michael A. Shore, Jeffrey P. Wright, Todd A. Merritt | 2001-02-20 |
| 6188624 | Low latency memory sensing circuits | — | 2001-02-13 |
| 6172935 | Synchronous dynamic random access memory device | Jeffrey P. Wright | 2001-01-09 |
| 6157560 | Memory array datapath architecture | — | 2000-12-05 |
| 6154860 | High-speed test system for a memory device | Jeffrey P. Wright, Paul Fuller | 2000-11-28 |
| 6144610 | Distributed circuits to turn off word lines in a memory array | Kamin Fei | 2000-11-07 |
| 6141290 | Method and apparatus for controlling the operation of an integrated circuit responsive to out-of-synchronism control signals | Timothy B. Cowles, Jeffrey P. Wright | 2000-10-31 |
| 6133053 | Circuit and a method for configuring pad connections in an integrated device | Jeffrey P. Wright | 2000-10-17 |
| 6121785 | Circuit and a method for configuring pad connections in an integrated device | Jeffrey P. Wright | 2000-09-19 |
| 6122219 | Split array semiconductor graphics memory architecture supporting maskable block write operation | Hui Zhao | 2000-09-19 |
| 6097781 | Shared counter | Jeffrey P. Wright | 2000-08-01 |
| 6097640 | Memory and circuit for accessing data bits in a memory array in multi-data rate operation | Kamin Fei, Teng Su | 2000-08-01 |
| 6094396 | Memory array architecture for multi-data rate operation | — | 2000-07-25 |
| 6094378 | System for improved memory cell access | — | 2000-07-25 |
| 6061292 | Method and circuit for triggering column select line for write operations | Teng Su, Kamin Fei | 2000-05-09 |
| 6061291 | Memory integrated circuit supporting maskable block write operation and arbitrary redundant column repair | — | 2000-05-09 |
| 6055289 | Shared counter | Jeffrey P. Wright | 2000-04-25 |
| 6046948 | Low word line to bit line short circuit standby current semiconductor memory | Yuan-Mou Su | 2000-04-04 |
| 6044027 | Circuit and method for providing a substantially constant time delay over a range of supply voltages | Jeffrey P. Wright | 2000-03-28 |
| 6011742 | Shared pull-up and selection circuitry for programmable cells such as antifuse cells | — | 2000-01-04 |
| 5999481 | Method and apparatus for controlling the operation of an integrated circuit responsive to out-of-synchronism control signals | Timothy B. Cowles, Jeffrey P. Wright | 1999-12-07 |
| 5998581 | Reductive alkylation of glycopeptide antibiotics | Richard Alan Berglund, Nancy Anne Lockwood, Howard Eugene Magadanz | 1999-12-07 |
| 5986945 | Memory device output circuit having multiple operating modes | — | 1999-11-16 |
| 5978298 | Shared pull-up and selection circuitry for programmable cells such as antifuse cells | — | 1999-11-02 |
| 5966388 | High-speed test system for a memory device | Jeffrey P. Wright, Paul Fuller | 1999-10-12 |