Issued Patents All Time
Showing 26–44 of 44 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11409436 | Buffer management in memory systems for read and write requests | Trevor Conrad Meyerowitz | 2022-08-09 |
| 11288199 | Separate read-only cache and write-read cache in a memory sub-system | — | 2022-03-29 |
| 11262946 | Cache-based memory read commands | Patrick A. La Fratta | 2022-03-01 |
| 11249924 | Secure data communication with memory sub-system | — | 2022-02-15 |
| 11210225 | Pre-fetch for memory sub-system with cache where the pre-fetch does not send data and response signal to host | — | 2021-12-28 |
| 11194518 | Pointer dereferencing within memory sub-system | — | 2021-12-07 |
| 11163486 | Memory sub-system-bounded memory function | Robert M. Walker | 2021-11-02 |
| 11157412 | Read commands based on row status prediction | Patrick A. La Fratta | 2021-10-26 |
| 11106609 | Priority scheduling in queues to access cache data in a memory sub-system | — | 2021-08-31 |
| 11099778 | Controller command scheduling in a memory system to increase command bus utilization | Trevor Conrad Meyerowitz | 2021-08-24 |
| 11099987 | Bit masking valid sectors for write-back coalescing | Trevor Conrad Meyerowitz, Fangfang Zhu | 2021-08-24 |
| 11086808 | Direct memory access (DMA) commands for noncontiguous source and destination memory addresses | Laurent Isenegger | 2021-08-10 |
| 11074007 | Optimize information requests to a memory system | Trevor Conrad Meyerowitz | 2021-07-27 |
| 11023166 | Quality of service control for read operations in memory systems | Trevor Conrad Meyerowitz | 2021-06-01 |
| 10990548 | Quality of service levels for a direct memory access engine in a memory sub-system | Laurent Isenegger | 2021-04-27 |
| 10969994 | Throttle response signals from a memory system | Trevor Conrad Meyerowitz | 2021-04-06 |
| 10970222 | Eviction of a cache line based on a modification of a sector of the cache line | Robert M. Walker | 2021-04-06 |
| 10908821 | Use of outstanding command queues for separate read-only cache and write-read cache in a memory sub-system | — | 2021-02-02 |
| 10782916 | Proactive return of write credits in a memory system | Trevor Conrad Meyerowitz | 2020-09-22 |