DB

Debra M. Bell

Micron: 99 patents #152 of 6,345Top 3%
NT Nanya Technology: 2 patents #292 of 775Top 40%
MT Mircon Technology: 1 patents #1 of 36Top 3%
📍 Boise, ID: #66 of 3,546 inventorsTop 2%
🗺 Idaho: #89 of 8,810 inventorsTop 2%
Overall (All Time): #11,672 of 4,157,543Top 1%
111
Patents All Time

Issued Patents All Time

Showing 51–75 of 111 patents

Patent #TitleCo-InventorsDate
10990317 Memory with automatic background precondition upon powerup Anthony D. Veches, James S. Rehmeyer, Robert Bunnell, Nathaniel J. Meier 2021-04-27
10936209 Memory error indicator for high-reliability applications Erika Prosser, Aaron P. Boehm 2021-03-02
10930335 Apparatuses and methods for selective row refreshes Jeff A. McClain, Brian Callaway 2021-02-23
10921996 Data lines updating for data generation Naveh Malihi 2021-02-16
10910033 Refresh-related activation in memory Stephen Michael Kaminski, Anthony D. Veches, James S. Rehmeyer, Dale H. Hiscock, Joshua E. Alzheimer 2021-02-02
10885967 Systems and methods for improving power efficiency in refreshing memory banks James S. Rehmeyer, George B. Raad, Brian Callaway, Joshua E. Alzheimer 2021-01-05
10832754 Current monitor for a memory device Kristen M. Hopper, Aaron P. Boehm 2020-11-10
10825492 Methods and apparatuses for command shifter reduction Kallol Mazumder 2020-11-03
10803926 Memory with on-die data transfer Dale H. Hiscock, Michael Kaminski, Joshua E. Alzheimer, Anthony D. Veches, James S. Rehmeyer 2020-10-13
10803969 Memory authentication Shea M. Morrison, Aparna U. Limaye, Diana C. Majerus, Rachael R. Carlson 2020-10-13
10789182 System and method for individual addressing Paul Glendenning, David R. Brown, Harold B Noyes 2020-09-29
10762946 Memory with partial array refresh Dale H. Hiscock, Michael Kaminski, Joshua E. Alzheimer, Anthony D. Veches, James S. Rehmeyer 2020-09-01
10748600 Phase charge sharing reduction James S. Rehmeyer, George B. Raad, Markus H. Geiger, Anthony D. Veches 2020-08-18
10741566 Integrated arrangements of pull-up transistors and pull-down transistors, and integrated static memory 2020-08-11
10734044 Apparatuses and methods for latching data input bits 2020-08-04
10725952 Accessing status information 2020-07-28
10521366 System and method for individual addressing Paul Glendenning, David R. Brown, Harold B Noyes 2019-12-31
10468421 Memory cells and memory arrays Scott J. Derner 2019-11-05
10410696 Methods and apparatuses for command shifter reduction Kallol Mazumder 2019-09-10
10388334 Scan chain operation in sensing circuitry Joshua E. Alzheimer 2019-08-20
10339071 System and method for individual addressing Paul Glendenning, David R. Brown, Harold B Noyes 2019-07-02
10303632 Accessing status information 2019-05-28
10268602 System and method for individual addressing Paul Glendenning, David R. Brown, Harold B Noyes 2019-04-23
10177159 Memory cells and memory arrays Scott J. Derner 2019-01-08
10134461 Apparatuses and methods for selective row refreshes Jeff A. McClain, Brian Callaway 2018-11-20