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Dean E. Walker — 41 Patents

Micron: 36 patents #532 of 6,374Top 9%
FNFoundry Networks: 3 patents #42 of 112Top 40%
CNChiaro Networks: 2 patents #17 of 33Top 55%
Allen, TX: #60 of 1,376 inventorsTop 5%
Texas: #2,412 of 125,132 inventorsTop 2%
Overall (All Time): #75,001 of 4,157,543Top 2%
41 Patents All Time
Dean E. Walker has been granted 41 US patents while listed as an inventor at Micron. The first was granted in 2004 and the most recent in November 2025. Dean E. Walker ranks #75,001 of 4,157,543 US inventors in our database (top 1.8%). Patent records list Dean E. Walker in Allen, TX, US.

Issued Patents All Time

Showing 1–25 of 41 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
12481465 Host-preferred memory operation Tony M. Brewer 2025-11-25
12367148 Variable execution time atomic operations Tony M. Brewer 2025-07-22
12321274 Recall pending cache line eviction Tony M. Brewer 2025-06-03
12282800 Thread replay to preserve state in a barrel processor Chris Baronne, John Amelio 2025-04-22
12190987 Method for configuring multiple input-output channels Tony M. Brewer 2025-01-07
12135987 Thread scheduling control and memory splitting in a barrel processor Chris Baronne, John Amelio 2024-11-05 $88,145,000
12111770 Silent cache line eviction Tony M. Brewer 2024-10-08 $26,633,000
12111758 Synchronized request handling at a memory device Tony M. Brewer 2024-10-08 $26,633,000
12079516 Host-preferred memory operation Tony M. Brewer 2024-09-03 $19,072,000
12020064 Rescheduling a failed memory request in a processor Chris Baronne, John Amelio 2024-06-25 $27,776,000
12013788 Evicting a cache line with pending control request Tony M. Brewer 2024-06-18 $38,359,000
11960768 Memory-side cache directory-based request queue Tony M. Brewer 2024-04-16 $24,030,000
11960403 Variable execution time atomic operations Tony M. Brewer 2024-04-16 $24,030,000
11953989 Low-latency register error correction Chris Baronne 2024-04-09 $33,276,000
11940919 Recall pending cache line eviction Tony M. Brewer 2024-03-26 $24,732,000
11914516 Memory side cache request handling Tony M. Brewer 2024-02-27 $14,682,000
11868300 Deferred communications over a synchronous interface Tony M. Brewer 2024-01-09 $10,439,000
11734173 Memory access bounds checking for a programmable atomic operator Tony M. Brewer, Chris Baronne 2023-08-22 $9,108,000
11726914 Bias control for a memory device Bryan Hornung, Tony M. Brewer, David Patrick, Christopher Baronne 2023-08-15 $9,169,000
11722138 Dynamic power and thermal loading in a chiplet-based system Tony M. Brewer, David Patrick, Michael Grassi, Bryan Hornung 2023-08-08 $8,604,000
11698791 On-demand programmable atomic kernel loading Tony M. Brewer, Chris Baronne 2023-07-11 $14,705,000
11669487 Secondary device detection using a synchronous interface Tony M. Brewer 2023-06-06 $9,972,000
11669486 Initialization sequencing of chiplet I/O channels within a chiplet system Tony M. Brewer 2023-06-06 $9,972,000
11650876 Payload parity protection for a synchronous interface Tony M. Brewer 2023-05-16 $14,212,000
11614942 Reuse in-flight register data in a processor Christopher Baronne 2023-03-28 $13,032,000

Nearby-Ranked Inventors

Gurmeet Singh Bhutani41
Keith Alan Bowman41
Devran Albay41
Kevin Owen41
Berend Eling41
Tomohiro Nezuka41
Ta-Wei Lin41
Qiang Zhang41
Adriaan J. Kuyler41