Issued Patents All Time
Showing 1–15 of 15 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11829441 | Device and method for flexibly summing matrix values | Krishnakumar Narayanan Nair, Ehsan Khish Ardestani Zadeh | 2023-11-28 |
| 11614920 | Bypassing zero-value multiplications in a hardware multiplier | Abdulkadir Utku Diril, Zhao-Jun Wang | 2023-03-28 |
| 11599181 | Systems and methods for reducing power consumption of convolution operations of artificial neural networks | Krishnakumar Narayanan Nair, Abdulkadir Utku Diril, Yuchen Hao, Rakesh Komuravelli, Ehsan Khish Ardestani Zadeh +1 more | 2023-03-07 |
| 11580192 | Grouped convolution using point-to-point connected channel convolution engines | Rakesh Komuravelli, Krishnakumar Narayanan Nair, Abdulkadir Utku Diril, Ehsan Khish Ardestani Zadeh, Yuchen Hao +4 more | 2023-02-14 |
| 11537865 | Mapping convolution to a channel convolution engine | Krishnakumar Narayanan Nair, Rakesh Komuravelli, Abdulkadir Utku Diril, Ehsan Khish Ardestani Zadeh, Yuchen Hao +4 more | 2022-12-27 |
| 11520854 | Support for different matrix multiplications by selecting adder tree intermediate results | Yuchen Hao, Krishnakumar Narayanan Nair, Ehsan Khish Ardestani Zadeh, Rakesh Komuravelli, Abdulkadir Utku Diril | 2022-12-06 |
| 11520853 | Mapping convolution to a partition channel convolution engine | Krishnakumar Narayanan Nair, Rakesh Komuravelli, Abdulkadir Utku Diril, Ehsan Khish Ardestani Zadeh, Yuchen Hao +4 more | 2022-12-06 |
| 11455143 | Using a low-bit-width dot product engine to sum high-bit-width numbers | Krishnakumar Narayanan Nair, Ehsan Khish Ardestani Zadeh | 2022-09-27 |
| 11443013 | Pipelined pointwise convolution using per-channel convolution operations | Rakesh Komuravelli, Krishnakumar Narayanan Nair, Abdulkadir Utku Diril, Ehsan Khish Ardestani Zadeh, Yuchen Hao +4 more | 2022-09-13 |
| 11409838 | High throughput matrix processor with support for concurrently processing multiple matrices | Krishnakumar Narayanan Nair, Olivia Wu, Ehsan Khish Ardestani Zadeh, Abdulkadir Utku Diril, Yuchen Hao +2 more | 2022-08-09 |
| 11379557 | Device and method for flexibly summing matrix values | Krishnakumar Narayanan Nair, Ehsan Khish Ardestani Zadeh | 2022-07-05 |
| 11372644 | Matrix processing instruction with optional up/down sampling of matrix | Krishnakumar Narayanan Nair, Yuchen Hao | 2022-06-28 |
| 11275560 | Hardware for floating-point arithmetic in multiple formats | Abdulkadir Utku Diril, Krishnakumar Narayanan Nair, Zhao-Jun Wang, Rakesh Komuravelli | 2022-03-15 |
| 11188303 | Floating point multiply hardware using decomposed component numbers | Krishnakumar Narayanan Nair, Anup Ramesh Kadkol, Ehsan Khish Ardestani Zadeh, Olivia Wu, Yuchen Hao +1 more | 2021-11-30 |
| 11157594 | Matrix multiplication in hardware using modular math | — | 2021-10-26 |