EZ

Ehsan Khish Ardestani Zadeh

Meta: 12 patents #547 of 6,845Top 8%
Huawei: 1 patents #8,196 of 15,535Top 55%
📍 San Jose, CA: #4,970 of 32,062 inventorsTop 20%
🗺 California: #46,935 of 386,348 inventorsTop 15%
Overall (All Time): #362,750 of 4,157,543Top 9%
13
Patents All Time

Issued Patents All Time

Showing 1–13 of 13 patents

Patent #TitleCo-InventorsDate
12282429 Systems and methods for adaptive hybrid hardware pre-fetch Elnaz Ebrahimi, Wei-Yu Chen, Liang Peng 2025-04-22
11599181 Systems and methods for reducing power consumption of convolution operations of artificial neural networks Krishnakumar Narayanan Nair, Abdulkadir Utku Diril, Yuchen Hao, Thomas Mark Ulrich, Rakesh Komuravelli +1 more 2023-03-07
11580192 Grouped convolution using point-to-point connected channel convolution engines Rakesh Komuravelli, Krishnakumar Narayanan Nair, Abdulkadir Utku Diril, Yuchen Hao, Martin Schatz +4 more 2023-02-14
11537865 Mapping convolution to a channel convolution engine Krishnakumar Narayanan Nair, Rakesh Komuravelli, Abdulkadir Utku Diril, Yuchen Hao, Martin Schatz +4 more 2022-12-27
11520853 Mapping convolution to a partition channel convolution engine Krishnakumar Narayanan Nair, Rakesh Komuravelli, Abdulkadir Utku Diril, Yuchen Hao, Martin Schatz +4 more 2022-12-06
11520854 Support for different matrix multiplications by selecting adder tree intermediate results Yuchen Hao, Krishnakumar Narayanan Nair, Rakesh Komuravelli, Abdulkadir Utku Diril, Thomas Mark Ulrich 2022-12-06
11481471 Mapping convolution to a matrix processor unit Krishnakumar Narayanan Nair, Abdulkadir Utku Diril, Dheevatsa Mudigere, Olivia Wu, Yuchen Hao 2022-10-25
11455143 Using a low-bit-width dot product engine to sum high-bit-width numbers Thomas Mark Ulrich, Krishnakumar Narayanan Nair 2022-09-27
11443013 Pipelined pointwise convolution using per-channel convolution operations Rakesh Komuravelli, Krishnakumar Narayanan Nair, Abdulkadir Utku Diril, Yuchen Hao, Martin Schatz +4 more 2022-09-13
11409838 High throughput matrix processor with support for concurrently processing multiple matrices Krishnakumar Narayanan Nair, Olivia Wu, Abdulkadir Utku Diril, Thomas Mark Ulrich, Yuchen Hao +2 more 2022-08-09
11379557 Device and method for flexibly summing matrix values Krishnakumar Narayanan Nair, Thomas Mark Ulrich 2022-07-05
11188303 Floating point multiply hardware using decomposed component numbers Krishnakumar Narayanan Nair, Anup Ramesh Kadkol, Olivia Wu, Yuchen Hao, Thomas Mark Ulrich +1 more 2021-11-30
10872038 Memory organization for matrix processing Krishnakumar Narayanan Nair, Olivia Wu, Yuchen Hao 2020-12-22