Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9703916 | Streaming, at-speed debug and validation architecture | Rajeev Sehgal, Srinivas Mandavilli, Ajit Singh, Henry Potts | 2017-07-11 |
| 9673819 | Metastability glitch detection | Rajeev Sehgal, Srinivas Mandavilli, Ajit Singh, Henry Potts | 2017-06-06 |
| 8539406 | Equivalence checking for retimed electronic circuit designs | Michael Mahar, James C. Henson, Anant Jain | 2013-09-17 |