Issued Patents All Time
Showing 1–17 of 17 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10425099 | Extremely-fine resolution sub-ranging current mode Digital-Analog-Converter using Sigma-Delta modulators | Sadok Aouini, Ahmed Emara, Mahdi Parvizi, Naim Ben-Hamida | 2019-09-24 |
| 10312869 | Methods and devices relating to high gain amplifiers | Ming Yang | 2019-06-04 |
| 9680271 | Sensor systems and methods for analyte detection | Jonathan Ikola Saari, Nate Quitoriano, James Forbes | 2017-06-13 |
| 9400269 | Systems for detecting target chemicals and methods for their preparation and use | Patanjali Kambhampati, Jonathan Ikola Saari, Nate Quitoriano, James Forbes | 2016-07-26 |
| 8933742 | Methods and devices relating to time-variable signal processing | Mohammad Ali Bakhshian | 2015-01-13 |
| 8855215 | Phase/frequency synthesis using periodic sigma-delta modulated bit-stream techniques | Sadok Aouini | 2014-10-07 |
| 8849882 | Generation of an analog Gaussian noise signal having predetermined characteristics | Sadok Aouini | 2014-09-30 |
| 8258892 | High-speed bandpass serial data link | Ramesh Abhari, Asanee Suntives, Nathan T. Smith | 2012-09-04 |
| 7474974 | Embedded time domain analyzer for high speed circuits | Mouna Safi-Harab, Mourad Oulmane | 2009-01-06 |
| 7315574 | System and method for generating a jittered test signal | Mohamed M. Hafed, Geoffrey Duerden | 2008-01-01 |
| 7242209 | System and method for testing integrated circuits | Antonio Chan, Geoffrey Duerden, Mohamed M. Hafed, Sebastien Laberge, Bardia Pishdad +1 more | 2007-07-10 |
| 7035269 | Method and apparatus for distributed synchronous clocking | David Rolston, David V. Plant | 2006-04-25 |
| 6931579 | Integrated excitation/extraction system for test and measurement | Mohamed M. Hafed | 2005-08-16 |
| 6917320 | Method and device for use in DC parametric tests | Clarence K. L. Tam | 2005-07-12 |
| 6914548 | Programmable DC voltage generator | Mohamed M. Hafed, Sebastien Laberge | 2005-07-05 |
| 6850051 | Timing measurement device using a component-invariant vernier delay line | Antonio Chan | 2005-02-01 |
| 6727834 | Method and device for use in DC parametric tests | Clarence K. L. Tam | 2004-04-27 |