Issued Patents All Time
Showing 101–125 of 142 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8223559 | Method of programming a memory | Wen-Chiao Ho, Chin-Hung Chang, Chun-Hsiung Hung | 2012-07-17 |
| 8223562 | Method and system for a serial peripheral interface | Chun-Hsiung Hung, Chia-He Liu | 2012-07-17 |
| 8208323 | Method and apparatus for protection of non-volatile memory in presence of out-of-specification operating voltage | Chun-Hsiung Hung, Nai-Ping Kuo, Ken-Hui Chen, Yu-Chen Wang | 2012-06-26 |
| 8203896 | Memory chip and method for operating the same | Chun-Hsiung Hung, Chuan-Ying Yu, Chun-Yi Lee | 2012-06-19 |
| 8190984 | Memory and method for checking reading errors thereof | Wen-Chiao Ho, Chin-Hung Chang, Chun-Hsiung Hung | 2012-05-29 |
| 8190840 | Memory devices with data protection | Yu-Lan Kuo, Chun-Yi Lee, Chun-Hsiung Hung | 2012-05-29 |
| 8085611 | Twisted data lines to avoid over-erase cell result coupling to normal cell result | Yung-Feng Lin, Chun-Hsiung Hung | 2011-12-27 |
| 8064268 | Method and system for a serial peripheral interface | Chun-Hsiung Hung, Chia-He Liu | 2011-11-22 |
| 8041912 | Memory devices with data protection | Yu-Lan Kuo, Chun-Yi Lee, Chun-Hsiung Hung | 2011-10-18 |
| 7969803 | Method and apparatus for protection of non-volatile memory in presence of out-of-specification operating voltage | Chun-Hsiung Hung, Nai-Ping Kuo, Ken-Hui Chen, Yu-Chen Wang | 2011-06-28 |
| 7965551 | Method for metal bit line arrangement | Wen-Chiao Ho, Chun-Hsiung Hung | 2011-06-21 |
| 7925960 | Memory and method for checking reading errors thereof | Wen-Chiao Ho, Chin-Hung Chang, Chun-Hsiung Hung | 2011-04-12 |
| 7889572 | Memory with high reading performance and reading method thereof | Wen-Chiao Ho, Chin-Hung Chang, Chun-Hsiung Hung | 2011-02-15 |
| 7885120 | Double programming methods of a multi-level-cell nonvolatile memory | Chun-Hsiung Hung, Wen-Chiao Ho | 2011-02-08 |
| 7885129 | Memory chip and method for operating the same | Chun-Hsiung Hung, Chuan-Ying Yu, Chun-Yi Lee | 2011-02-08 |
| 7869276 | Nand type memory and programming method thereof | Wen-Chiao Ho, Chin-Hung Chang, Chun-Hsiung Hung | 2011-01-11 |
| 7755945 | Page buffer and method of programming and reading a memory | Wen-Chiao Ho, Chin-Hung Chang, Chun-Hsiung Hung | 2010-07-13 |
| 7710802 | Method for testing memory | Chin-Hung Chang, Wen-Chiao Ho, Chun-Hsiung Hung | 2010-05-04 |
| 7652512 | Clock synchronizing circuit | Wen-Chiao Ho, Chin-Hung Chang, Chun-Hsiung Hung | 2010-01-26 |
| 7639533 | Multi-level memory cell programming methods | Chin-Hung Chang, Wen-Chiao Ho, Chun-Hsiung Hung | 2009-12-29 |
| 7626867 | Method for accessing memory by way of step-increasing threshold voltage | Chun-Hsiung Hung, Wen-Chiao Ho | 2009-12-01 |
| 7619925 | Virtual ground array memory and programming method thereof | Chin-Hung Chang, Wen-Chiao Ho, Chun-Hsiung Hung | 2009-11-17 |
| 7613049 | Method and system for a serial peripheral interface | Chun-Hsiung Hung, Chia-He Liu | 2009-11-03 |
| 7580302 | Parallel threshold voltage margin search for MLC memory application | Wen-Chiao Ho, Chin-Hung Chang, Cheng Chi Liu, Chun-Hsiung Hung | 2009-08-25 |
| 7548462 | Double programming methods of a multi-level-cell nonvolatile memory | Chun-Hsiung Hung, Wen-Chiao Ho | 2009-06-16 |