Issued Patents All Time
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11204766 | Proactive Di/Dt voltage droop mitigation | Jason Seung-Min Kim, Nitin N. Garegrat, Anitha Loke, David Fang, Kursad Kiziloglu +3 more | 2021-12-21 |
| 7769166 | Dual mode AES implementation to support single and multiple AES operations | Venkatesh Balasubramanian | 2010-08-03 |
| 7545900 | Low jitter and/or fast lock-in clock recovery circuit | Ho-Ming Leung, Ka-Shu Ko | 2009-06-09 |
| 5954789 | Quotient digit selection logic for floating point division/square root | Robert K. Yu, J. Arjun Prabhu | 1999-09-21 |