KG

Kiran Gunnam

LS Lsi: 39 patents #11 of 1,740Top 1%
WT Western Digital Technologies: 20 patents #137 of 3,180Top 5%
Disney: 12 patents #608 of 6,686Top 10%
TS Texas A&M University System: 11 patents #33 of 1,706Top 2%
VU Velodyne Lidar Usa: 6 patents #7 of 48Top 15%
CE Certicom: 3 patents #40 of 112Top 40%
VL Velodyne Lidar: 2 patents #9 of 20Top 45%
ST Sandisk Technologies: 2 patents #967 of 2,224Top 45%
AS Agere Systems: 1 patents #984 of 1,849Top 55%
🗺 California: #2,363 of 386,348 inventorsTop 1%
Overall (All Time): #15,402 of 4,157,543Top 1%
97
Patents All Time

Issued Patents All Time

Showing 76–97 of 97 patents

Patent #TitleCo-InventorsDate
8407567 Reconfigurable adder 2013-03-26
8402324 Communications system employing local and global interleaving/de-interleaving Yang Han 2013-03-19
8402348 Systems and methods for variable data processing using a central queue Shaohua Yang 2013-03-19
8392692 Determining index values for bits of binary vector by processing masked sub-vector index values 2013-03-05
8381074 Systems and methods for utilizing a centralized queue based data processing circuit Shaohua Yang 2013-02-19
8381071 Systems and methods for decoder sharing between data sets 2013-02-19
8359515 Forward substitution for error-correction encoding and the like 2013-01-22
8359522 Low density parity check decoder for regular LDPC codes Gwan S. Choi 2013-01-22
8352847 Matrix vector multiplication for error-correction encoding and the like 2013-01-08
8334705 Analog circuitry to conceal activity of logic circuitry Jay Scott Fuller 2012-12-18
8327235 Error-floor mitigation of error-correction codes by changing the decoder alphabet 2012-12-04
8321746 Systems and methods for quasi-cyclic LDPC code production and decoding Zongwang Li, Hao Zhong, Yang Han, Shaohua Yang, Yuan Xing Lee 2012-11-27
8316272 Error-correction decoder employing multiple check-node algorithms 2012-11-20
8312342 Reconfigurable minimum operator 2012-11-13
8307253 Reconfigurable two's-complement and sign-magnitude converter 2012-11-06
8291292 Optimizing error floor performance of finite-precision layered decoders of low-density parity-check (LDPC) codes Nedeljko Varnica, Gregory Burd 2012-10-16
8276055 Low latency programmable encoder with outer systematic code and low-density parity-check code Farshid Rafiee Rad 2012-09-25
8245098 Selectively strengthening and weakening check-node messages in error-correction decoders Yang Han, Shaohua Yang, Hao Zhong, Nils Graef, Yuan Xing Lee 2012-08-14
8196010 Generic encoder for low-density parity-check (LDPC) codes Nedeljko Varnica 2012-06-05
8065598 Low latency programmable encoder with outer systematic code and low-density parity-check code Farshid Rafiee Rad 2011-11-22
8044832 Interleaver for turbo equalization Yifei Zhang, Gregory Burd 2011-10-25
7911364 Interleaver for turbo equalization Yifei Zhang, Gregory Burd 2011-03-22