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Nils Graef — 33 Patents

ASAgere Systems: 24 patents #24 of 1,849Top 2%

APAvago Technologies General Ip (Singapore) Pte.: 4 patents #274 of 2,004Top 15%

LSLsi: 3 patents #1,291 of 3,238Top 40%

ACApplied Micro Circuits: 1 patents #192 of 311Top 65%

Milpitas, CA: #127 of 3,192 inventorsTop 4%

California: #15,252 of 386,348 inventorsTop 4%

Overall (All Time): #105,480 of 4,157,543Top 3%

33 Patents All Time

Nils Graef has been granted 33 US patents while listed as an inventor at Agere Systems. The first was granted in 2009 and the most recent in September 2017. Nils Graef ranks #105,480 of 4,157,543 US inventors in our database (top 2.5%). Patent records list Nils Graef in Milpitas, CA, US.

Patents per Year

Issued Patents All Time

Showing 1–25 of 33 patents

Patent #	Title	Co-Inventors	Date	Approx Value ⓘ
9753877	Memory read-channel with signal processing on general purpose processor	Erich F. Haratsch	2017-09-05	$57,045,000
9544090	Hard input low density parity check decoder	—	2017-01-10	$25,915,000
9356623	LDPC decoder variable node units having fewer adder stages	—	2016-05-31	$112,809,000
9069687	Memory read-channel with selective transmission of error correction data	Nirav Dave, Johnson Yen	2015-06-30	$55,977,000
8797795	Methods and apparatus for intercell interference mitigation using modulation coding	Erich F. Haratsch, Milos Ivkovic, Victor Krachkovsky, Andrei Vityaev, Johnson Yen	2014-08-05
8578256	Low-latency decoder	—	2013-11-05
8503128	Systems and methods for variable compensated fly height measurement	—	2013-08-06
8484535	Error-floor mitigation of codes using write verification	Kiran Gunnam	2013-07-09
8375281	Method and apparatus for storing survivor paths in a viterbi detector using systematic pointer exchange	—	2013-02-12
8248170	Stabilized digital quadrature oscillator	Dariush Dabiri, Dongwoon Bai, Wenwei Pan	2012-08-21
8250386	Turning off buffer when a digital back end operates at a same data rate as the analog front end	—	2012-08-21
8245098	Selectively strengthening and weakening check-node messages in error-correction decoders	Yang Han, Kiran Gunnam, Shaohua Yang, Hao Zhong, Yuan Xing Lee	2012-08-14
8245120	Power reduced queue based data detection and decoding systems and methods for using such	Changyou Xu, Shaohua Yang, Hao Zhong, Ching-Fu Wu	2012-08-14
8196002	Systems and methods for joint LDPC encoding and decoding	—	2012-06-05
8161345	LDPC decoders using fixed and adjustable permutators	—	2012-04-17
8161348	Systems and methods for low cost LDPC decoding	—	2012-04-17
8140947	Method and apparatus for storing survivor paths in a Viterbi detector using systematic pointer exchange	—	2012-03-20
8098451	Systems and methods for variable fly height measurement	—	2012-01-17
8077812	Reduced-complexity multiple-input, multiple-output detection	Joachim S. Hammerschmdit	2011-12-13
8046669	Method and apparatus for evaluating performance of a read channel	Zachary Keirn	2011-10-25
8032818	Method and apparatus for storing survivor paths in a Viterbi detector using input-dependent pointer exchange	—	2011-10-04
8014196	Reduced-power programming of multi-level cell (MLC) memory	—	2011-09-06
7971125	Systems and methods for prioritizing error correction data	Erich F. Haratsch	2011-06-28
7941732	Method and apparatus for evaluating performance of a read channel	Zachary Keirn	2011-05-10
7876847	Global minimum-based MLD demapping for soft-output MIMO detection	Joachim S. Hammerschmidt	2011-01-25