Issued Patents All Time
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8775888 | Methods and structure for correlating multiple test outputs of an integrated circuit acquired during separate instances of an event | Eugene Saghi, Jeffrey K. Whitt | 2014-07-08 |
| 8745457 | Methods and structure for utilizing external interfaces used during normal operation of a circuit to output test signals | Eugene Saghi, Paul J. Smith, Jeffrey K. Whitt | 2014-06-03 |
| 8738979 | Methods and structure for correlation of test signals routed using different signaling pathways | Paul J. Smith, Jeffrey K. Whitt, Eugene Saghi, Douglas J. Saxon | 2014-05-27 |
| 8589722 | Methods and structure for storing errors for error recovery in a hardware controller | Sreedeepti Reddy, Jeffrey K. Whitt | 2013-11-19 |
| 8521931 | Serial input output (SIO) port expansion apparatus and method | William K. Petty | 2013-08-27 |
| 8271811 | Methods and apparatus for load-based power management of PHY logic circuits of a SAS device based upon a current workload | Brian A. Day | 2012-09-18 |
| 7636798 | Methods and systems for integrating unique information in SAS interface components | Steven F. Faulhaber, Matthew K. Freel | 2009-12-22 |
| 7502874 | Methods and systems for integrating unique information in SAS interface components | Steven F. Faulhaber, Matthew K. Freel | 2009-03-10 |
| 7493532 | Methods and structure for optimizing SAS domain link quality and performance | Erik Paulsen, Gabriel L. Romero | 2009-02-17 |