Issued Patents All Time
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7555688 | Method for implementing test generation for systematic scan reconfiguration in an integrated circuit | Narendra Devta-Prasanna, Arun Gunda | 2009-06-30 |
| 7210083 | System and method for implementing postponed quasi-masking test output compression in integrated circuit | Mikhail I. Grinchuk, Erik Vaclav Chmelar | 2007-04-24 |