Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
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Cleo Mui — 2 Patents

LSLattice Semiconductor: 2 patents #213 of 544Top 40%
Beaverton, OR: #1,635 of 3,140 inventorsTop 55%
Oregon: #12,752 of 28,073 inventorsTop 50%
Overall (All Time): #1,709,992 of 4,157,543Top 45%
2 Patents All Time
Cleo Mui has been granted 2 US patents while listed as an inventor at Lattice Semiconductor. All of these patents were granted in 2017. Cleo Mui ranks #1,709,992 of 4,157,543 US inventors in our database (top 41.1%). Patent records list Cleo Mui in Beaverton, OR, US.

Issued Patents All Time

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
9819174 Hotswap operations for programmable logic devices Christopher W. Dix, Cheng-Jen Gwo, Joel Coplen, Srirama Chandra 2017-11-14 $1,277,000
9772856 System-level dual-boot capability in systems having one or more devices without native dual-boot capability Srirama Chandra, Cheng-Jen Gwo, Saurabh Chheda 2017-09-26 $4,445,000