MK

Manami Kudou

KT Kabushiki Kaisha Toshiba: 3 patents #8,011 of 21,451Top 40%
Overall (All Time): #1,607,850 of 4,157,543Top 40%
3
Patents All Time

Issued Patents All Time

Showing 1–3 of 3 patents

Patent #TitleCo-InventorsDate
6617622 Pad layout and lead layout in semiconductor device having a center circuit Masaru Koyanagi 2003-09-09
6510087 Semiconductor memory device Kazuhide Yoneya, Masaru Koyanagi, Toshiki Hisada, Katsuki Matsudera 2003-01-21
6303948 Pad layout and lead layout in semiconductor device Masaru Koyanagi 2001-10-16