Issued Patents All Time
Showing 126–150 of 152 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6967874 | Non-volatile semiconductor memory device and electric device with the same | — | 2005-11-22 |
| 6937510 | Non-volatile semiconductor memory | Hiroshi Nakamura, Ken Takeuchi, Kenichi Imamiya | 2005-08-30 |
| 6907497 | Non-volatile semiconductor memory device | Kenichi Imamiya, Hiroshi Nakamura, Mikito Nakabayashi, Koichi Kawai | 2005-06-14 |
| 6903981 | Non-volatile semiconductor memory device, method for sub-block erase and electric device with the same | Takuya Futatsuyama, Kenichi Imamiya, Noboru Shibata | 2005-06-07 |
| 6891757 | Semiconductor memory device | Hiroshi Nakamura | 2005-05-10 |
| 6882569 | Non-volatile semiconductor memory device | Kenichi Imamiya, Hiroshi Nakamura | 2005-04-19 |
| 6879520 | Non-volatile semiconductor memory device and electric device with the same | Hiroshi Nakamura, Kenichi Imamiya | 2005-04-12 |
| 6865112 | Non-volatile semiconductor memory device in which one page is set for a plurality of memory cell arrays | Koichi Kawai, Kenichi Imamiya, Hiroshi Nakamura | 2005-03-08 |
| 6859401 | Fail number detecting circuit of flash memory | Tamio Ikehashi, Tomoharu Tanaka, Kenichi Imamiya, Hiroshi Nakamura, Ken Takeuchi | 2005-02-22 |
| 6839283 | Non-volatile semiconductor memory device with reduced chip real estate area for transfer transistors | Takuya Futatsuyama | 2005-01-04 |
| 6831859 | Non-volatile semiconductor memory for storing initially-setting data | Toshihiko Himeno, Kenichi Imamiya, Hiroshi Nakamura | 2004-12-14 |
| 6807099 | Semiconductor memory device | Hiroshi Nakamura | 2004-10-19 |
| 6798697 | Non-volatile semiconductor memory device | Kenichi Imamiya, Hiroshi Nakamura | 2004-09-28 |
| 6798683 | Pattern layout of transfer transistors employed in row decoder | Hiroshi Nakamura, Kenichi Imamiya, Tomoharu Tanaka | 2004-09-28 |
| 6751122 | Nonvolatile semiconductor memory device | Koichi Kawai, Kenichi Imamiya | 2004-06-15 |
| 6717858 | Non-volatile semiconductor memory device in which one page is set for a plurality of memory cell arrays | Koichi Kawai, Kenichi Imamiya, Hiroshi Nakamura | 2004-04-06 |
| 6704223 | Non-volatile semiconductor memory | Toshihiko Himeno, Kenichi Imamiya, Hiroshi Nakamura | 2004-03-09 |
| 6690596 | Pattern layout of transfer transistors employed in a row decoder | Hiroshi Nakamura, Kenichi Imamiya, Tomoharu Tanaka | 2004-02-10 |
| 6657896 | Fail number detecting circuit of flash memory | Tamio Ikehashi, Tomoharu Tanaka, Kenichi Imamiya, Hiroshi Nakamura, Ken Takeuchi | 2003-12-02 |
| 6649945 | Wiring layout to weaken an electric field generated between the lines exposed to a high voltage | Hiroshi Nakamura, Kenichi Imamiya | 2003-11-18 |
| 6597602 | Semiconductor memory device | Kenichi Imamiya, Hiroshi Nakamura | 2003-07-22 |
| 6522583 | Nonvolatile semiconductor memory | Kazushige Kanda, Hiroshi Nakamura, Tamio Ikehashi, Kenichi Imamiya | 2003-02-18 |
| 6507508 | Pattern layout of transfer transistors employed in row decoder | Hiroshi Nakamura, Kenichi Imamiya, Tomoharu Tanaka | 2003-01-14 |
| 6507518 | Fail number detecting circuit of flash memory | Tamio Ikehashi, Tomoharu Tanaka, Kenichi Imamiya, Hiroshi Nakamura, Ken Takeuchi | 2003-01-14 |
| 6462985 | Non-volatile semiconductor memory for storing initially-setting data | Toshihiko Himeno, Kenichi Imamiya, Hiroshi Nakamura | 2002-10-08 |