Issued Patents All Time
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12432967 | Semiconductor device and manufacturing method thereof | Yuhki Fujino, Tsuyoshi Kachi, Shingo Sato | 2025-09-30 |
| 8158472 | Structures of SRAM bit cells | — | 2012-04-17 |
| 8110874 | Hybrid substrates and method of manufacture | — | 2012-02-07 |
| 7820492 | Electrical fuse with metal silicide pipe under gate electrode | Yoshiaki Toyoshima | 2010-10-26 |
| 7652335 | Reversely tapered contact structure compatible with dual stress liner process | — | 2010-01-26 |
| 7638432 | Semiconductor device comprising metal silicide films formed to cover gate electrode and source-drain diffusion layers and method of manufacturing the same | Hisao Yoshimura, Mariko Takagi | 2009-12-29 |
| 7220672 | Semiconductor device comprising metal silicide films formed to cover gate electrode and source-drain diffusion layers and method of manufacturing the same | Hisao Yoshimura, Mariko Takagi | 2007-05-22 |
| 6869867 | SEMICONDUCTOR DEVICE COMPRISING METAL SILICIDE FILMS FORMED TO COVER GATE ELECTRODE AND SOURCE-DRAIN DIFFUSION LAYERS AND METHOD OF MANUFACTURING THE SAME WHEREIN THE SILICIDE ON GATE IS THICKER THAN ON SOURCE-DRAIN | Hisao Yoshimura, Mariko Takagi | 2005-03-22 |
| 6673705 | Method of manufacturing a MISFET having post oxide films having at least two kinds of thickness | — | 2004-01-06 |